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I know that if I use vias on high speed traces that I need to reduce the inductance effect of the via. So I will put ground vias next to these vias to help returning current. I have seen a picture about using ground vias that has confused me. Here is the first picture:

enter image description here

Everything seems OK on the left one, returning current turns from the reference layer ground. On the right image the vias between the two ground planes seems OK too.

But in this picture:

enter image description here

Which I desire to use for my design one layer is ground and one layer is the power plane. When I saw the picture, it uses two vias and a bypass between them. Do I have to use it like this, or any other advice?

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  • \$\begingroup\$ When you talk about "high-speed" traces, how high a speed are you talking about? 100 MHz? 1 GHz? 10 GHz? \$\endgroup\$ – The Photon Apr 8 '13 at 15:08
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    \$\begingroup\$ e2e.ti.com/cfs-file.ashx/__key/… , The English Version \$\endgroup\$ – Spoon Apr 8 '13 at 16:23
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This is my understanding, based on very little knowledge:

The the return current for the high speed part of the signal will take the path of least inductance. This means travelling along whichever plane is closest to the track. (In fact, it will travel on the side of that plane closest to the track).

When your signal track moves from the top layer to the bottom layer, the return current will want to move from one plane to the other (whichever is closest to the track). If these were both ground planes, then your second image would be fine. You can simply connect the two planes together with a via. But in your third image, you can't connect the two planes together with a via, because this is a short circuit.

If only there was some way to allow the high speed part of the return current to move from one plane to the other, without shorting out those planes. If only there was a component which conducted high speed signals, but blocked DC current.

Oh wait, there is. It's a capacitor!

The return current will flow along one plane, then, when the signal track changes layer, the return current will come up one via, through the capacitor, down the other via, into the other plane, and continue following the track.

In fact, this is exactly what the diagram shows in the yellow arrows.

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  • \$\begingroup\$ That is the answer i am looking for. So if i want to use power and Ground on different planes, do i have to use two vias to connect them with Capacitor? is this a good design? or Power plane may include Ground too then i can connect Ground parts directly to each other with via. Which one is more reliable and better? \$\endgroup\$ – user22165 Apr 8 '13 at 12:48
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I believe the last picture is when you are applying a signal that is referenced to the power plane. This is not uncommon. See the signal return path (in yellow on the right) is returning via the power-plane and this informs me that it is this type of signal i.e. referenced to the power-plane.

There is a little confusion because there is very little need to try and alter its path to return on the ground-plane so, I think the diagram is showing you that decoupling capacitors can distribute a return signal (coming from power) to being seen on the ground-plane also.

I think you probably need to tell us where the pictures came from and what the article's description was for this last picture.

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  • \$\begingroup\$ ti.com/ww/kr/article/08feb_num11.html this is the article that includes these pictures. Not in English. in fact I wonder that when i used one plane as Power and one plane for ground how can i connect this planes with via for reducing inductance. \$\endgroup\$ – user22165 Apr 8 '13 at 10:55
  • \$\begingroup\$ Looking at the pictures I believe @Andy is correct. The picture shows clearances around the vias at the different planes. To connect a signal return from the Power plane to a Ground plane they show the capacitor. I am no expert but I would not have though to use a Power plane for a signal return in normal circumstances .... you learn something new every day. \$\endgroup\$ – Spoon Apr 8 '13 at 16:01
  • \$\begingroup\$ Still i am not sure which design should I choose. I will use one plate as Power one plate as Ground. But how should I connect vias to reduce induction on this way \$\endgroup\$ – user22165 Apr 8 '13 at 17:14
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The capacitance between the power plane and ground plane, due to the parallel surface areas, provides the signal return path. No additional capacitors needed. As long as you have a contiguous ground plane it does not matter much if you go across power plane(s).

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