What is the advantage of turning off a MOSFET on negative gate to source biased voltage of 5V instead of 0V? I saw that it is a very common phenomenon in SiC MOSFET as their datasheet always specifies a negative gate to source biased voltage to turn it off while in traditional silicon MOSFETs 0V is taken as turn off voltage. What does this difference actually mean when comparing SiC and Si MOSFETs?


1 Answer 1


The main purpose for using a negative voltage for SiC mosfets is to prevent the device from turning on unintentionally. Another potential benefit for using a negative gate voltage is that it would decrease the fall time when turning off the device. With that being said, if all you want is faster fall times you would want take other paths first like changing the gate resistance and choosing an appropriate driver.

There are two main reasons why SiC mosfets sometimes need a negative voltage and regular Si mosfets don't;

1.) Some SiC mosfets have very low threshold voltages, so any ringing or noise on the gate will make it more likely to unintentionally turn on vs a regular Si mosfet. This really depends on the manufacturer. For example look at the threshold voltage for this MicroSemi SiC device (MSC035SMA070B4) vs this Infineon SiC device (IMZA65R027M1HXKSA1). The Infineon part has basically the same Vgth as a regular Si mosfet, while the MicroSemi is around half the voltage.

2.) This is the more common reason, at least from my experience. If you compare these two devices (one being SiC and the other Si) from Infineon IMZA65R027M1HXKSA1, IPZ60R040C7XKSA1 you'll see that the gate charge for the SiC device is half of the Si device. The lower the gate charge, the faster you're able to turn on/off the device. This then creates a higher dv/dt on the VDS. In a totem pole / half bridge configuration the miller effect on the low side mosfet gets worse the higher the dv/dt is. I won't get into two much detail, but basically the sudden change in voltage on the gate to drain capacitance causes the voltage to start rising. If you compound the high dv/dt and a low VGS(thres) you have a recipe for disaster in a half bridge configuration.

With that being said, you don't always need the negative voltage. You should actually avoid it if possible. The body diode losses will increase the more negative the gate voltage is. If you're not switching the device any faster than it's Si counter part and the threshold voltage is reasonable like the IMZA65R027M1HXKSA1, then there's no need to have a negative voltage. It really comes down to the application to really determine if it's needed.

There are methods out there to prevent the gate voltage from rising. I personally use a miller clamp. This clamps the gate to the source after the device is turned off and it falls to a certain voltage level like 1V-2V or so. You can also put a capacitor from gate to source, but this is counter productive because it negates the benefit of the faster switching speeds, so I personally don't recommend this option.

On the surface manufacturers make it seem like the negative voltage always needed. In reality they likely give this impression because they want your design to work so you can buy their parts. If you tell everyone to use a negative gate voltage, you'll reduce the number of people having failures and blaming the device instead of their own design.

  • \$\begingroup\$ Thank you so much for detailed answer to my question \$\endgroup\$
    – Alison
    Jan 4, 2023 at 7:09

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