I am tinkering with a device to generate pulses for a measurement setup. No need to buy it: Just wondering how one would implement it.
Device generates a square-wave (Vpp and DC-offset) output between V- and V+ with frequency f, duty-cycle d, and rise = fall times of t.
Vout: -5V <= V- and V+ <= +5V, adjustable via DAC (Vpp and offset)
Frequency: 10 Hz<->1 MHz with 1 Hz resolution and low jitter (Maybe via uC timer?)
Duty-cycle between 10 and 90% (maybe via uC timer?)
tRise/tFall adjustable between 1 ns and 10 ms (Yes, 10 ms for the low frequencies). The rise/fall portion of the square wave should be fairly linear.
The operations are somewhat simple: Set offset and Vpp, set f/d/tRise/tFall and generate a pulse-train for example. Or a continuous signal if you like.
I get my head around the output-stage: Feed the "finished" (correct wave form, normalized amplitude and DC offset) into a analog-stage which adds DC offset and scaling based on DAC outputs. Feed it into 50 Ω BNC. So far so good.
I also can get my head around how to generate the variable signal (control frequency and duty cycle) via an uC timer for example.
What I can not get: How to make the rise/fall times controllable in some way? I mean, you could oversample the signal with a DAC pretty hard -> let's say 100 MSamples would allow to "approximate the ramp" in 100 steps. But there have to be different ways to do this, which I can't come up with.
How could one implement this without oversampling/approximating the waveform with a really fast DAC?
Are there some op-amps out there which give you configurable (e.g. via analog-input) slew-rates? Or are there logic gates which can do this? Are there any parts (especially over the entire range 1 ns<->10 ms)?
I mean you could also use a good ARB and build "parametric-waveforms" of some sort, but this goes down the "sample a DAC really fast" road.
Based on user4474's input I came up with this idea:
This should give a output voltage which swings between V-<->V+ with "controllable" ramp rates based on the DAC bias voltages. The actual signal is generated via PWM and can be fed into the switches connecting the DAC voltages to the circuit.
Then, based on four switches, the desired signal is derived and can bee feed into the scale and offset stage.
A variable amount of current is forced thorugh a integration capacitor C_i. Therefore a speific voltage is across the voltage based on the time and the amount of current used. The Ramp can therefore be controlled by controlling the current thorugh the cap. This voltage is buffered and scaled / Dc-offset and pushed into the output.
To limit transient effects when switching current sources, they pump their current into an op-amp at the same voltage as the integrator cap if not in use. For switching one could use Make-Before-Break Analog switches. The voltage accross the integrator is limited to a given threshold with two op-amps (positive and negative clamp).
The raw PWM signal can be used to manipulate the current soure switches, while the "ramp-rate" can be controlled by a I(u) source of some sort (DAC with Op-Amp).
Rising/Falling Edges can be achieved by sourcing/sinking positive/negative current "into" the C respectivly.