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ST has a guide to crystals for STM32 MCUs that includes a fairly elaborate method of laying out the PCB near the oscillator circuitry (section 7.2). I want to make sure I'm understanding what they are recommending, and also ask a couple of questions not addressed in the guide.

1. Is this a correct understanding the recommended PCB layout?

Here's what they depict:

top pcb layer

ground layer

I'm interpreting this to mean:

  • On the top layer of the PCB: you create a "guard ring" (a thick copper pour around the crystal and its passives with lots of vias down to the ground layer) and then enclose that in a "gap" (no copper area).

  • On the ground layer of the PCB, you create an identically shaped gap to isolate the oscillator ground from the rest of the PCB ground.

Is that the right interpretation?

2. What should be the thickness of the guard ring and gap?

The oscillator guide is completely silent on this point.

I think the diagram is probably to scale, so I guessed that the CL1 and CL2 caps were 0603, and from there was able to estimate the guard ring is about 20-25 mils and the gap is about 7-10 mils. Would those values work?

3. What bridges the gap between the isolated oscillator ground and the PCB ground?

Clearly, the gap isolated oscillator ground has to return current to the main PCB ground at some point, but I don't see where this bridging is supposed to occur. Is it happening inside the IC itself?

4. How do you handle the VDD/VSS pair that must be enclosed inside the gap?

In the top layer, there are two second column balls that are via'd out to lower layers (circled in green below), and I'm guessing these are meant to be a VDD and a VSS ball pair. While don't know what ball out is for this device, the OSC_IN/_OUT and OSC32_IN/_OUT are already accounted for in the first column of balls, so those two second column balls within the gap have to be something else.

possible VDD and VSS balls

Assuming that those two second column balls are in fact a VDD/VSS pair, this raises the question of where you place the decoupling capacitor that must go between them. This is not shown in the diagram or discussed in the text. Does that mean the decoupling cap should be fully outside the guard ring+gap?

Or should you put the decoupling cap fully inside the guard ring + gap to keep it “electrically close” to the VDD/VSS pair?

5. Is it actually a good idea to break up the ground layer of a PCB?

The oscillator guide justifies this guard ring+gap stuff by saying “A guard ring around these connections, connected to the ground, is essential to avoid capturing unwanted noise, which can affect oscillation stability.” (emphasis added)

But there are many different types of traces in a digital logic circuit that will be sensitive to noise; do we usually break up the ground layer with guard rings and gaps in each place where noise-sensitive traces exist?

6. Could I avoid all this messiness in the PCB layout by just using a fancier or more noise-immune crystal?

I’m not designing a high-volume consumer product where total BOM cost is important, so I’d gladly pay extra for a “noise-immune” resonator if it simplified the PCB layout. Do such crystals exist? For example, would a canned oscillator with crystal + load caps in a metal case be more immune to noise?

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  1. Yes it is right interpretation.

  2. Should not matter much. As long as you can fit the stitching vias on the guard ring, and as long as the gap which separates the different ground planes is wide enough to manufacture it.

  3. It usually happens at or near the MCU ground pin, not inside the MCU. And in this case it looks like the ground planes also go to MCU ground balls and there are vias to ground plane right next to the ground balls.

  4. Many options. BGAs allow the bypass caps to be under the PCB for example. Or the caps can be on top plane but further away. They should be linked by supply and ground planes anyway. It's always a trade-off what you want to optimize.

  5. The ground layers are sectioned as needed. Sometimes you have analog section, digital section, power supply section, and ground planes are shaped so that e.g. strong digital currents don't flow in the analog section so they don't mess with sensitive analog readings.

  6. Of course. You can just buy a crystal oscillator module which you feed 3.3V and it outputs square wave to MCU. But on the other hand, the best practices how to do a PCB layout for a crystal is just that, an ideal set of rules how it should be done. If you look at STM32 eval boards, the crystal just happily ticks away on the same ground plane as everything else, and no problems there. The sensitivity is perhaps a bit exaggerated. They are sensitive and you should be aware of it, but it's not that sensitive. It depends on how much noise and disturbance you expect. When making a standard hobbyist or even consumer products, guard rings and separate crystal ground planes likely won't matter much. But if you are making aerospace, military, space flight, medical sort of things, every detail may count.

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  • \$\begingroup\$ Thanks for the reply. I'm still not seeing where the isolated oscillator ground connects with the main PCB ground. Are you talking about that one via that seems to straddle the gap? (the first one you hit as you move your finger up from the capital "T" in "STM32"?) Or are you saying that all the MCU ground balls are connected internally and that the path is: the isolated ground plane -> one or more ground balls within the gap -> all the other ground balls -> main PCB ground? \$\endgroup\$
    – jemalloc
    Commented Jan 9, 2023 at 12:19
  • \$\begingroup\$ @jemalloc I believe if the two BGA balls you encircled with green are GND pins, the grey vias touched by green ring are connecting crystal ground planes to common ground plane. \$\endgroup\$
    – Justme
    Commented Jan 9, 2023 at 21:16
  • \$\begingroup\$ The grey vias touched by green are fully enclosed within the gap region on both the top and ground layer of the PCB. Those vias are not in contact with the PCB's larger common ground. For current to return from the gap-isolated ground region to the PCB common ground, there has to be some path that "crosses the gap." This is what I am not seeing. \$\endgroup\$
    – jemalloc
    Commented Jan 9, 2023 at 22:27

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