# Gain of 0 dB for a common drain using JFET

I need to design a circuit that has a gain of 0 dB that allows a voltage attack on a 100 Ω load.

My first thought was to make a common-drain circuit since I had to use only JFETs. First I only used 1 JFET resulting in a gain of -3.6 dB. To increase it, I connected JFETs in parallel, 4 exactly, to have a "super transistor" which improved my gain to -1.26 dB, but I am still quite far from the result. I could've added more but I want this circuit to be makeable without too many struggles. I tried to modify every single resistance and even added some, but -1.26 dB was my best result. This was my circuit:

The specifications needed:

• Input impedance of at least 1 kΩ
• Max. output impedance of 10 Ω
• Gain of 0 dB, so replicate the input signal.
• Power supply of +/-12 V
• Input signal is 2 V amplitude sine wave with 200 Hz to 5 kHz frequency

Any ideas on how to improve this?

Here is the simulation:

PS: I know a 100 Ω load is ridiculous for a voltage attack because I will need an output impedance ≤ 10 Ω, but it is how it is.

Transient simulation at 2 kHz:

• Is there any reason why you don't use a current source? Commented Jan 11, 2023 at 21:16
• Can you post the input and output waveforms? I'm suspecting some distortion is being introduced. Commented Jan 11, 2023 at 21:38
• Why don't you use a wire to connect your voltage source to the 100 ohm load. That has a gain of 0 dB within reason. Commented Jan 11, 2023 at 21:54
• @TTiM3R I meant it as biasing instead of your resistor. But it doesn't matter, your transistor choice isn't good for what you want. Commented Jan 11, 2023 at 21:56
• I don't see a spec for input impedance. One can get gain into a 100 ohm load by using a common-gate circuit - but input impedance must be quite low. Commented Jan 11, 2023 at 21:58

How much swing are you expecting?

If somehow you want to go +/-11V (Otherwise I do not understand your supply voltage choice), then this is hopeless.

According to this datasheet (https://www.linearsystems.com/lsdata/datasheets/J111_SST111_Low_Noise_N-Channel_JFET_Switch.pdf), the min. IDSS of a J113 is 2mA.

If you want to go all the way to 11V, then you need to sink 110mA into your 100 ohm load (11V/100ohm). I don't think using ~55 units in parallel is a good idea for this.

You're going to need a device with a much bigger current handling capability if you want any gain close to 0dB at those swings.

• No I want a swing of +-2V as I want to replicate my input signal which is a 2V amplitude sine wave with a frequency in the range of 200 to 5kHz. Commented Jan 11, 2023 at 22:27
• @TTiM3R then why +/-12V as supply? Commented Jan 12, 2023 at 5:56
• It is imposed for this project Commented Jan 12, 2023 at 6:18