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While looking at USB 3.0 Host Controller reference design, I came across this circuit:

enter image description here

They used LL4148 diode in this design.

Note: PONRST goes directly to the Host Controller IC.

I'm trying to understand the idea behind why is this circuit used.

To my understanding, when when 3V3AUX_in = 3.3V, the PONRST pin is 3.3V, and the capacitor is charged.

Now, if we assume that we lost the power, 3V3AUX_in will be 0V, and for some short period of time PONRST pin will still be 3.3V because it takes time to discharge the capacitor.

Since LL4148 Forward Voltage is maximum 1V, when PONRST=3.3V, the Anode of D5 is 3.3V and the Cathode is 0V and the diode will not conduct.

In the meanwhile, the capacitor will start discharging to GND untill the voltage reaches 1V and now the diode will conduct and the discharging will be faster. thus, we will discharge the PONRST pin faster and maybe protect the PONRST pin from being powered while the IC itself is not powered.

Is my analysis right?

Also, is it okay to replace this diode with CDBQR0130L-HF?

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    \$\begingroup\$ the diode conducts when forward biased \$\endgroup\$
    – jsotola
    Jan 19 at 16:02

5 Answers 5

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Is my analysis right?

No, it's incorrect.

Since LL4148 Forward Voltage is maximum 1V, when PONRST=3.3V, the Anode of D5 is 3.3V and the Cathode is 0V and the diode will not conduct.

No, the diode will heavily conduct for a short period of time and rapidly discharge the capacitor C45.

In the meanwhile, the capacitor will start discharging to GND until the voltage reaches 1V and now the diode will conduct and the discharging will be faster.

No, you have this back-to-front, the diode will stop conducting so heavily when C45 has depleted to less than 1 volt and, diode current will be about 100 μA when C45 is around 0.5 volts.

thus, we will discharge the PONRST pin faster and maybe protect the PONRST pin from being powered while the IC itself is not powered.

No, that's the wrong way around.

Also, is it okay to replace this diode with CDBQR0130L-HF?

I wouldn't because mouser reports it as an end-of-life device: -

enter image description here

It's not really compatible in PCB area either so technically (even if you were to buy a bunch of these SOD-923F footprint devices) it might be a problem fitting it onto a SOD-80 footprint of the LL4148.

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    \$\begingroup\$ "conduction will barely be noticeable in the diode when C45 is around 0.5 volts." -- specifically for this device, it's still about twice as much current as what goes through the 10K resistor at 0.5V. \$\endgroup\$
    – Matt S
    Jan 19 at 16:57
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    \$\begingroup\$ @MattS I stand corrected; the LL4148 will be taking 100 uA whilst the 10 k will be taking only 50 uA. I'll massage my answer to make it clearer. Thanks. \$\endgroup\$
    – Andy aka
    Jan 19 at 17:33
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D5 is a clamping diode. If the reset pin has protection diodes internally then you don't have to place D5.

At power on everything can happen on 3V3 rail. For example, if it starts with an overshoot of at least 1V then the RESET pin may get damaged. To prevent this there are clamping diodes to "clamp" the pin voltage to 3.3V plus diode drop. Datasheets indicate some absolute allowed values about the pins such as VDD + 0.6V.

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  • \$\begingroup\$ How can ever the diode conduct? it means that the PONRST pin has to go above 3.3V by 0.5V or 1V for the diode to be forward biased. how can this happen? \$\endgroup\$
    – Firas Abd El Gani
    Jan 19 at 16:20
  • \$\begingroup\$ When the supply rail goes low at startup there will be charge on that capacitor. You don't want reset to be held above supply at the IC. So it can have a brief late summer on power down as a power-supply smoothing capacitor until everything is over. \$\endgroup\$
    – Dannie
    Jan 19 at 17:01
  • \$\begingroup\$ "D5 is a clamping diode. If the reset pin has protection diodes internally then you don't have to place D5". That may not be true. It depends on the current/energy carrying capability of the ESD diodes, and how often a loss of 3V3AUX_In is expected to occur. \$\endgroup\$
    – SteveSh
    Jan 19 at 17:47
  • \$\begingroup\$ @Xhero39 how can this happen? 10k and 1u form a low-pass filter with a cut-off frequency of ~16 Hz and a slope of 20 dB/dec. This means that even the mains frequency can still pass through but with losing some amplitude, like shown here. So if the mains ripple on top of 3.3V is large enough then the RST pin can see >4V which might be enough to damage the pin. With the diode, once the pin sees a large enough voltage to forward bias the diode, it'll conduct and clamp the pin voltage at less voltage, like shown here. \$\endgroup\$
    – Rohat Kılıç
    Jan 20 at 7:42
  • \$\begingroup\$ @Xhero39 when the power is disconnected, is there still 3.3V at the place that is labeled 3.3V? \$\endgroup\$
    – user253751
    Jan 20 at 13:15
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The diode conducts significantly when the power supply voltage drops more than about 0.6V below whatever the capacitor voltage is at the moment. It stops conducting significantly when the forward voltage drops below some hundreds of mV.

The idea behind this kind of capricious circuit is that the 3.3V supply will drop precipitously (due to some unseen load between the 3.3V rail and ground) that is sufficient to discharge the capacitor quickly) and the power will not be re-applied until some time has elapsed, and the power will be re-applied 'cleanly' so it rises more-or-less (the requirement depends on the characteristics of the reset pin it is connected to) monotonically to near 3.3V. If the load is light (a CMOS circuit perhaps, depending on the state etc.), then there is no guarantee the capacitor will discharge promptly in order to properly generate a reset pulse when power is re-applied.

It's a wretched excecrable excuse for a proper supervisory reset circuit and thus inadequate for anything much of importance. But if you insist, the most cheap and popular SMT part is the MELF LL4148 or the leaded 1N4148. Or use half of a BAV99.

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The point of this circuit is to delay PONRST on power-on.

When power to 3V3AUX_in is turned on, the capacitor starts charging through the resistor. It will take approximately 10 milliseconds to reach 2 volts, which is typical input threshold for 3.3V logic to react.

When power is turned off, the diode will quickly discharge the capacitor. This is important both to be ready for a new power-on, and to protect the reset pin from voltages exceeding supply rail.

Pretty much any small signal diode is suitable for this circuit.

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This setup allows an external controller to drive the PONRST pin low, but pulls the pin high if not driven externally. It provides some noise immunity with a capacitor, and the diode ensures the pin never floats more than 1 V above the power rail.

Since LL4148 Forward Voltage is maximum 1V, when PONRST=3.3V, the Anode of D5 is 3.3V and the Cathode is 0V and the diode will not conduct.

At power off, presumably, the voltage at 3V3AUX_In begins to drop from 3.3 V. A current begins to flow through R31, and as the charge stored in C45 decreases, the PONRST voltage also begins to drop.

If PONRST is ever more than 1 V (i.e. the forward voltage of the LL4148) above the cathode 3V3AUX_In, the diode will conduct, discharging the capacitor much more quickly, and ensuring the PONRST voltage is never more than one diode drop higher than the 3.3V rail.

Note that the diode has a nominal \$V_f\$ of 1 V, but does conduct at a lower voltage: for example, at 0.5 V, 100 uA flows through it, effectively tripling the discharge rate of the capacitor.

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  • \$\begingroup\$ What I don't understand, how PONRST will ever be higher than 1V. could it happen internally inside the chip by mistake? \$\endgroup\$
    – Firas Abd El Gani
    Jan 19 at 16:16
  • \$\begingroup\$ PONRST never has to change for it to become 1 V above the power rail. All that needs to happen is the power rail has to drop quickly enough from 3.3V to 0V. Under normal circumstances, during operation, PONRST and the rail are both at 3.3V. But at power-off, it's possible for the power rail to drop before PONRST can "catch up." \$\endgroup\$
    – Matt S
    Jan 19 at 16:48
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    \$\begingroup\$ It's also possible that some external device (not shown on your schematic) or some transient voltage can drive the PONRST pin above 3.3V; the diode will conduct some of that extra current and prevent the pin from seeing a voltage higher than 4.3 V. (Note that when dealing with transient surges, the diode's switching-on time and various parasitics come into play, and the pin may still see a momentary voltage well above the theoretical 4.3V clamping voltage.) \$\endgroup\$
    – Matt S
    Jan 19 at 16:54

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