What is this single-wire bidirectional communications protocol?

Question

I'm attempting to build an interface for a 1985 IBM typewriter keyboard. This is interesting because it's bidirectional --- the keyboard has a screen on it. I was expecting some variation of XT or AT protocol, but it's really not.

There appear to be two wires which are used; one is clearly a reset line and is of no further interest; and the other is used for all data transmissions. There is no clock wire.

So far I've observed:

• data transmission is in short packets, probably bytes. One is pictured above. Each one is prefixed with a much higher frequency prologue sequence. I've observed at least two kinds. (Keyboard→machine and machine→keyboard?)

• looking at it on the scope, the leading edges are very sloppy, but trailing edges are sharp. If I assume that only the trailing edges are the ones of significance, but the sequence pictured only has five, which isn't enough for a simple time-between-trailing-edges protocol.

• the pulse width is very approximately 100us, meaning the protocol runs at 100kHz-ish, which seems reasonable. The short pulses are about 20us from trailing edge to trailing edge.

• (new) Taking a logic analyser trace without the keyboard attached shows that the base station is sending the initial high-frequency sequence and then waiting for a response. This suggests that the protocol is polled and controlled from the master end.

• (new) In the trace below, there are four timings: high intervals can be 45us or 67us. Low intervals can be 54us or 44us. This doesn't add up neatly to simple async mark/space bits.

• (new) There's no high-level timing structure I can see --- i.e. no sequences which look like packets or frames. The only communication is a constant stream of sequences like the one below. (newer) This actually turns out to be wrong. There are some multi-packet sequences, mostly in startup and initialisation; I was just looking in the wrong place. I'm not sure they help to identify what this is, however.

I wasn't expecting anything quite this... odd. It's certainly not any of the one-wire protocols I've encountered before. I've double checked that there isn't a clock wire hidden away anywhere. Any ideas?

(As an aside, none of the ICs on the keyboard are identifiable! Mysteriously so, in fact. There's a chip with the TI logo with a number starting with SH, which is not Texas Instruments' IC prefix (SN)? Likewise, a National Semiconductor chip with an NK code (should be DM/LM/MM)... even the MCU just says it's an Intel 'PI M A'. Picture attached.)

Answer 1

Figured it out, thanks to some help from someone on Reddit --- it turns out that I was dramatically overthinking things!

It's just a simple UART connection, at about 190kbaud. It's either 8n1 with some undetermined parity bit or 9n1. It's strictly master-slave; the master (the base station) sends a byte and then the slave (the keyboard) responds with another byte, rinse and repeat. Those 'fast pulses' are actually the command byte sent by the master. The things which I thought were bits are 0x000 and 0x100, depending on the length. The sequence above is the base station querying the keyboard for status and the keyboard replying with 0x100. The only difficult part is determining the baud rate, as low bits tend to be about 5.75us long, but high bits are 5us --- maybe it's bitbanged?

And that's all there is to it. The higher-level protocol is more complex but I'm making progress. I suppose the moral is that things are frequently more boring than they seem!

Answer 2

Maybe something like SDLC (or some variant) implemented with open-collector outputs for half-duplex over a single wire.

There were some MCS51 MCUs of that era made with on-chip SLDC controllers. The chip arrangement is suggestive of that kind of architecture, perhaps with external OTP EPROM as the TI chip.