Why are the op-amps' positive inputs getting biased to -3.8 V in this differential probe circuit?

Question

My students built a differential probe circuit, basically following this circuit from Hackaday shown below:

For U1 and U2 they instead used MAX4104ESA+ op-amps. The op-amps are supplied through +/-5 V linear regulators (7805 and 7905) from two 9 V block batteries. R23 and R24 were not included in their circuit.

When turning the circuit on, a constant -3.8 V appears on both op-amps' (U1.1 and U1.2) non-inverting inputs and that voltage stays constant, no matter what we apply on the voltage divider input.

Say we apply 9 V on J1+ and GND on J1-. The voltage at both op-amps' non-inverting inputs stays at -3.8 V, the voltage from J1+ to GND is 10 V, and the voltage across the upper part of the voltage divider (R2 to R5) now is 12.8 V. Setting the negative supply rail of the op-amps to 0 V pushes this bias to +2.2 V.

First I thought they might have included the wrong protection diodes D1 and D2 such that they pulled the signal to -Vcc, but desoldering them didn't change anything. The op-amps are all getting the correct voltage on the supply pins and are not drawing any excessive currents (20 mA per supply pin according to the data sheet). I also couldn't identify any errors or short-circuits on the PCB. Desoldering U1.1 caused the voltage at the non-inverting input of U1.2 to slightly change, I believe it was around -2 V. Desoldering U1.1 also, the voltage divider outputs started giving the correct attenuated voltages.

My final guess now is that the op-amps might be broken, but I am also not measuring any short-circuits or, as I said, excessive currents, and such a failure mode has never occured in any of my circuits before.

Unfortunately we do not have spares of the MAX4104 and no pin-compatible op-amps available. I'll have them fiddle in another type of op-amp today to see if we can get the circuit to work then and (hopefully) confirm, that it was indeed the op-amps.

Has anyone ever experienced such an error before or has an idea what might be causing this? Am I missing something crucial?

Answer 1

Has anyone ever experienced such an error before or has an idea what might be causing this? Am I missing something crucial?

Take note: -

• The input bias current for the MAX4104 is a whopping 32 μA (typical).

• The bias current for the LTC6269 (described is an Ultra-Low Bias Current FET Input Op Amp in the data sheet) is less than 4 pA (maximum).

That input bias current has to go somewhere and that somewhere are the resistors to the 0 volts formed by R21, R1, R6 and R11 (50% of it). That's about 41 kΩ: -

So, when 32 μA flows from the input and through 41 kΩ yoiu get a volt drop of 1.312 volts. That's the typical value you might expect so when you say this: -

When turning the circuit on, a constant -3.8 V appears on both op-amps' (U1.1 and U1.2) positive inputs

I can believe it. This is why we do simulations before we build.