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I have an analog signal that comes from another place with a range of 0-1 V, the required resolution should be 10 bit.

I want to sample the same signal in two ADCs, the internal ADC of the STM32, and an external ADC (AD7606BSTZ).

Is it worth adding an op-amp or a series resistor or any other element, or can the signal simply be split and take into account that each has a high input resistance? I would appreciate an explanation of what is true and why it is true.

The input signal acts like DC, it doesn't change too much.

enter image description here

you can see the analog signal output : https://docs.axsun.com/axsun-technologies-knowledge-base/ref-manual/electrical-interfaces-and-connectors enter image description here

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  • \$\begingroup\$ Where are you anti-alias filters placed? What sampling rates are employed by each ADC? Please provide a data sheet link for both ADCs. \$\endgroup\$
    – Andy aka
    Commented Feb 2, 2023 at 9:39
  • \$\begingroup\$ Should be no issues. The lower the frequency, the less important such stubs are. \$\endgroup\$
    – winny
    Commented Feb 2, 2023 at 9:39
  • \$\begingroup\$ What is the source impedance of the signal and the input impedances of the ADCs? \$\endgroup\$
    – D Duck
    Commented Feb 2, 2023 at 9:49

1 Answer 1

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The STM32 has is a SAR ADC. When this type of ADC samples the input signal, it connects its internal sampling capacitor to the input, which pulls current to charge the capacitor. This causes a glitch on the input signal.

You can find the sampling capacitor's value in the datasheet, along with the aperture time (or sampling time) which is how long the sampling switch remains closed.

To get an accurate reading, the signal source impedance should be such that voltage on the sampling capacitor settles to 1LSB of target within the sampling time.

If source impedance is too high, this may mean you have to add a buffer, but this opamp should also settle to 1LSB of target within the sampling time. If it's a slow opamp, that doesn't finish settling when the sampling window closes, it will be inaccurate. Another option if the signal is slow is to filter it with a cap. The sampling cap will pull an amount of charge from the filter cap, and q=CV, so if we want voltage on the filter cap to change by less than 1LSB then it has to be greater than the sampling cap multiplied by \$ 2^{nbits} \$. Then, sampling frequency should be low enough that the average current pulled by charging the sampling cap doesn't disturb the input by more than 1LSB, taking into account source impedance. This takes a lot of text to explain, but it's pretty simple, and you need a filter anyway.

Your other ADC is also a SAR, so the same rules apply depending on source impedance.

It is connected to the same input so both ADCs will see the glitch created by the other ADC.

The simplest solution is to not sample both ADCs at the same time.

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  • \$\begingroup\$ how to check the source impedance? this is the impedance on the ADC in stm32? I told you the voltage is between 0-1V, if the input impedance of ad7606 is 1Mohm the current is 1uA, is this answer ? what is the load in this case? \$\endgroup\$
    – Knowledge
    Commented Feb 2, 2023 at 10:57
  • \$\begingroup\$ Source impedance is the impedance of your signal source, the circuit that provides the voltage you want to measure. For example if it comes from a resistor divider, that's the output impedance of the resistor divider. \$\endgroup\$
    – bobflux
    Commented Feb 2, 2023 at 11:03
  • \$\begingroup\$ please look at my edit thanks, I cant see where to find the source impedance. \$\endgroup\$
    – Knowledge
    Commented Feb 2, 2023 at 11:12
  • \$\begingroup\$ There's probably an opamp inside the device buffering that signal, so it'll be low impedance, you'll be fine, just don't sample both ADCs at the same time \$\endgroup\$
    – bobflux
    Commented Feb 2, 2023 at 11:19
  • \$\begingroup\$ but If I want to compare these two results? how to be sure that one of the ADC did not get wrong? its critical for us, I cant trust only 1 ADC results, this is laser. \$\endgroup\$
    – Knowledge
    Commented Feb 2, 2023 at 11:40

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