I want to unterstand the process of firing a MOSFET und used an LTspice simulation to see the current flowing into gate capacitance und the resulting drain-source current. For this I used a simplified circuit in LTspice with two voltage sources, one permanent source of 10 V and one single-pulse voltage source for the gate.
I do not understand the simulation result as it shows a negative drain-source current in the first short time interval after pulling the gate to 2.5 V. Notice that I used such a low gate voltage for the MOSFET IRLH5036 to research switching behaviour on low voltage gate inputs e.g. from logic sources.
Here is the waveform. Notice that I multiplied I(R4) with factor 10 to make the effect more visible. The blue waveform drops to -84mA (-8.4 mA without factor mupltiplication) in the beginng. Ig(M1) presents the gate current on triggering at 100ms. I'm well aware that these MOSFETs have an internal reverse diode, but there should be no negative voltage bias over the MOSFET.
Attached here also the used circuit:
Any idea why this is occuring? Do you have literature hints?