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i need a little help with designing a power input "stage" for a product with the following requirements:

  1. Input-Voltage 5V +-10%
  2. Output-Voltage with two independent 1V8 rails (150mA max with T_ambient max. 85*C)
  3. Thermal shutdown, current limit (short circuit protection)
  4. Safe operation in case input is shorted and output has charged capacitance (10uF max)
  5. Reverse polarity protection on the input (max -5V 10%), no time limit
  6. TVS-Protection fullfilling

±16-kV HBM ESD

±8-kV IEC 61000-4-2 Contact discharge

±15-kV IEC 61000-4-2 Air gap discharge

±4-kV IEC 61000-4-4 Fast transient bursts

What i came up with:

schematic

simulate this circuit – Schematic created using CircuitLab

My questions are:

  1. Will the D1/D2 combination suffice in providing the required TVS and reverse polarity protection (correct parts are assumed)? I am worried, that D1 will die in case of transients.

  2. Will the LDO and all downstream circuits be protected from reverse polarity by D1?

  3. As i am not sure which TVS to select for D2 - can you please provide information what parametric inputs i should select on e.g. Digikey for the given application?

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  • \$\begingroup\$ The capacitors on voltage input rails usually shrug off ESD like it is nothing. LDO power inputs usually do not need ESD diodes for HBM, or 61000-4-2. But I am not sure what IEC 61000-4-4 entails. Do you know the test procedure for that one? \$\endgroup\$
    – user57037
    Commented Feb 3, 2023 at 7:04
  • \$\begingroup\$ @mkeith Thank you for your response. I am not sure what the standard implies/requires. I am trying to match the protection provided by ti.com/lit/ds/symlink/thvd1424.pdf - which is also usedon the product. I only found en.wikipedia.org/wiki/IEC_61000-4-4 as reference. \$\endgroup\$ Commented Feb 3, 2023 at 7:11
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    \$\begingroup\$ EFT carries energy/charge comparable to ESD, but in bursts of smaller pulses rather than single large pulses; it has the tendency to disrupt communications because of this burst behavior. I would not expect a power supply to have a problem with it, if it also handles ESD without upset. \$\endgroup\$ Commented Feb 3, 2023 at 7:14
  • \$\begingroup\$ You need to think about how the circuit will be grounded/earthed if you are considering all the IEC requirements. This usually means analysing the load on the output too. Do, you see the problem I am raising? Without knowledge of what/where earth connects to and, how impulses or surges can flow back to earth (due to an IEC transient), you cannot estimate what surge or transient currents can flow into the vulnerable terminals of your device. \$\endgroup\$
    – Andy aka
    Commented Feb 3, 2023 at 14:09
  • \$\begingroup\$ @Andyaka Thank you for your response! The output load just powers some logic stuff not connected to the outside world. The only connection present is the 5V in and an RS485 Port. The housing of the device is directly grounded whilst in use. \$\endgroup\$ Commented Feb 3, 2023 at 18:09

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You can add an input filter capacitor (10 μF MLCC) instead of the D2 TVS diode. It will protect your circuit from voltage fluctuations/spikes and you can also add a decoupling capacitor across the output for ripple rejection/smooth output.

The D1 diode is ok there for reverse polarity protection.

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  • \$\begingroup\$ Thank you for your response! The capacitors are not included in the schematic for readability. You stated 10uF on the Input - is this the nominal or effective capacitance (DC-derating and so on) on the input? And what voltage rating is required on the capacitor? \$\endgroup\$ Commented Feb 3, 2023 at 7:13
  • \$\begingroup\$ 10uf is the standard capacitor value if you are dealing with low-level voltage conversion basically used for spike protection. If your maximum input voltage is 5v then you can choose a capacitor whose voltage rating is higher that your input.(e.g 10uF/10v or 10uF/16v),You can easily find those values from your LDO datasheet. \$\endgroup\$
    – John Mist
    Commented Feb 3, 2023 at 9:50

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