The PESD3V3Y1BSF is a small device, much smaller (low capacitance) than you need for GPIOs. This isn't a downside; its performance specs are impressive! But it will be challenging to solder: a 0.3 x 0.6 mm body with 0.4 mm pad pitch, expect to need hot air, and preferably magnification too. Some automated assembly lines may charge a premium for this as well.
You cannot find a TVS with clamping voltage as low as the supply voltage, so honoring the strict GPIO voltage limit is impossible that way, I'm afraid.
However, we can note that the GPIOs are rated for -- well, whatever they are, typically 1kV HBM or more -- and we can use a TVS, plus a series resistor between TVS and GPIO, to emulate the same or less stress to the pin, while handling a much larger event. Since the peak current at 1kV will be about 3A, and the peak clamping voltage is about 13V, the difference or 10V should deliver less than 3A or 3.3 ohms should do.
You can always go with higher resistance of course, which also has the value of filtering the signal against the pin capacitance (which can be increased with an external capacitor for better RFI rejection).
(Note that filtering is preferably done in front of the TVS, as it will clamp or rectify RF, distorting the signal before it has been filtered otherwise. Typically a series ferrite bead or resistor will be used here, then a capacitor in parallel with the TVS. A large enough TVS can also be used to give some capacitance itself, e.g. the ~20pF a BAT54S contributes, or the ~100pF of a zener-type TVS.)
Filtering, and reducing the peak current, have the value of extending the operating conditions: tolerating more ambient noise and peak transients. For ESD, many devices are rated for class C behavior (may require power cycle to restore normal operation); if you require class B (momentary disruption, recovers automatically) or A (no disruption to function), consider these mitigations.