I am trying to understand the control operation of this battery charger IC utilizing feed forward voltage mode control from TI: https://www.ti.com/lit/ds/symlink/bq24600.pdf?ts=1675420477371&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FBQ24600

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As far as I understand, the blue an the green marked parts form the basic voltage mode control circuit and the feed forward operation is achieved by connecting the sawtooth amplitude with the input voltage.

But I can not wrap my head around it, how the connection of the voltage difference amplifier (blue) and the current difference amplifier (red) via a diode OR gate enables constant current in the CC charging phase and constant voltage in the CV charging phase.

Any explanations, maybe split by charging phase if helpfull, are greatly appreciated.


1 Answer 1


The two op-amps, their diodes, and the \$20\mu \mathrm A\$ current sink going into the compensation network make a circuit that passes whichever value is maximum. If the voltage error is higher than the current error, then the upper diode will conduct and the value going into the error amplifier will be dominated by the voltage term. If the current error is higher, then the lower diode will conduct, and the current term will dominate.

The net effect will be the desired one -- if both current and voltage are below their limits, the charger will charge more. If either one is above its limit, the charger will charge less. If the charger is correctly tuned, in steady state, and either input is at it's limit, then the charger will remain in steady state until things change.

I've got personal experience with exactly this sort of control loop, just in digital. It works quite well if you're careful about the transition point.

  • \$\begingroup\$ Thanks for the quick reply! When the battery SOC is rather low, the voltage error is rather high. Is this the reason the current signal is amplified by a factor of 20, so that a current error is more severely evaluated? Otherwise, how is a current limit implemented in the cc phase? \$\endgroup\$
    – Amigo54
    Commented Feb 3, 2023 at 16:40
  • \$\begingroup\$ That's worthy of a separate question. Short answer: it's to keep the loop gain roughly the same for CC and CV mode. \$\endgroup\$
    – TimWescott
    Commented Feb 3, 2023 at 16:44
  • 1
    \$\begingroup\$ I'm sorry -- I misunderstood your extra question. In the case you mention, the voltage feedback will be low, and will be overrun by the current feedback. The "bigger one wins" should happen with or without that 20x gain -- the gain is just there so that incremental changes in current have a greater effect on the loop. \$\endgroup\$
    – TimWescott
    Commented Feb 3, 2023 at 20:58
  • \$\begingroup\$ Thanks, I mixed up the voltage amplifier input terminals! \$\endgroup\$
    – Amigo54
    Commented Feb 4, 2023 at 5:40

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