4
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schematic

simulate this circuit – Schematic created using CircuitLab

I came with this circuit to know how an active load can improve it, I still can't finish to understand the role of active loads. The far I know is that below, Q5-Q6-R2 form a current source with gives the polarization DC current to Q4. Then I expect the circuit would be similar to a common emiter, but as I suggested on the title I'd be thankful if someone could explain me (suppose the components are perfectly matched):

-What's the purpose of using an active load Q1-Q3-R1 instead of a single resistor on the collector of Q4 and what advantage gives

-What could be a possible application for this circuit

Thanks if someone answer

EDIT: Some research I did. Actually both upper and lower pairs are current sources and active loads. If they have the same reference current, they will polarize Q4 and the current on load will be 0. On the other hand, the AC circuit would be:

schematic

simulate this circuit

Since it must be that \$ V_E = g_m R_{EA} (V_{in} - V_E)\$, then:

$$ V_o = g_m (R_L//R_{CA}) v_{in} \left(1 - \frac{g_m R_{EA}}{1 + g_m R_{EA}} \right) $$

Where REA and RCA are the AC equivalent resistance of the AC model of the active loads. But they are function of frequency. And so, I looked carefully at the expression. Does this mean that the circuit could be a filter that dispenses with capacitors? I'm too drugged? What do you think?

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  • \$\begingroup\$ Do you plan to use this amplifier as standalone, or within more stages and a global feedback loop? \$\endgroup\$
    – Designalog
    Feb 5, 2023 at 7:28
  • \$\begingroup\$ But the configuration shows your circuit will act more like an attenuator than an amplifier. The gain will be less than one. We are adding an active load in the IC design to increase the voltage. And we cannot use the resistors because they take a lot of space in the silicon. Thus we use transistors instead as load. \$\endgroup\$
    – G36
    Feb 5, 2023 at 8:15
  • \$\begingroup\$ But to get the benefits from the larger gain provided by an active load. Next stage input resistance also needs to be large. So this circuit is not suited to drive low resistance loads. And also some negative feedback is needed to "set" DC bias conditions at the desired and predictable "level". \$\endgroup\$
    – G36
    Feb 5, 2023 at 8:24
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    \$\begingroup\$ This topology is basically not-working. You have two different current souces series connected, Q1 and Q5. Two current sources can't possibly drive exactly the same current and hence the operating point point can only collapse with one of the sources saturated. You should get rid of either Q1 or Q5. \$\endgroup\$
    – carloc
    Feb 5, 2023 at 8:28
  • \$\begingroup\$ @ErnestoG I don't know how to use this circuit. This is just an exercise given where one has to guess a possible application for the circuit \$\endgroup\$
    – tac
    Feb 5, 2023 at 15:56

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