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I was going through this checklist for this device regarding the RESET pin.

In the checklist, on page 8, it is mentioned, "A hardware reset (RST# assertion) is required following power-up."

Can someone clarify what that means? Does it mean that besides the circuit on Figures 7-1 & 7-2, I need to place some hardware switch that will pull-down the RESET line once all the power supply are stable and running, or can I control the RESET pin from a microcontroller itself by, for example, by pulling the reset line from the MCU once all the power supplies are stable?

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  • \$\begingroup\$ Suggested reading. ti.com/lit/eb/slyy167/slyy167.pdf \$\endgroup\$ Commented Feb 15, 2023 at 9:17
  • \$\begingroup\$ Do you think there is any difference to the chip if reset is activated by a button or another chip? The datasheet examples show how to connect the reset. Have you seen them? Do the images have a pushbutton? \$\endgroup\$
    – Justme
    Commented Feb 15, 2023 at 9:19
  • \$\begingroup\$ @Justme, Oh, I was not sure. So, the RESET can be activated by the RESET from the MCU once all the power supplies are stable, right? \$\endgroup\$
    – user220456
    Commented Feb 15, 2023 at 9:39

2 Answers 2

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The phrasing is bad which makes the sentence incorrect. It says "A hardware reset (RST# assertion) is required following power-up.".

What it should say is that RST# must be asserted during power-up, not following it.

What it means it that RST# should be asserted while the circuit powers up and negated after the supply rails and clock oscillators are steady.

The strap input pin levels should also be steady by then and their levels can be sampled.

The below diagram from the datasheet specifies these requirements. RST# must be negated for tSR (10 ms min.) after the power rail is steady, then asserted any time afterwards.

The strap input pins must be set-up and steady for tCS (5 ns min.) pins before the RST# rising edge and held steady for tCH (5 ns min.) after it. If the strap input pins are just tied HIGH or LOW, tCS and tCH will definitely be met.

You can use an RC circuit to produce this reset but it's a bit rubbish in this day and age. A power rail supervisor IC will be very cheap, plentiful and give a specified minimum /RESET output pulse of 'x' ms after the supply rail it monitors reaches a specified threshold voltage, with a nice sharp transition delivered to RST#. It'll also generate a new reset pulse if the supply rail dips below the threshold. That's a part for you to select though, choose one with a minimum reset period of 10 ms including the part's tolerance. Unless your costs are very tight and/or you have very high volumes, it's the best solution over an RC.

enter image description here

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  • \$\begingroup\$ Thank you for your answer. But can you please make it a bit more clear for me from the image 7-12 in the datasheet? \$\endgroup\$
    – user220456
    Commented Feb 15, 2023 at 15:44
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Several pins, called strapping pins, must be stable prior to a low to high transition of #RST. So the power supply voltage must be stable for a specified time prior to releasing reset.

Strapping options allow the device to be configured at reset release.

The RC network shown in Figure 7-1 will delay reset release long enough without any other external switch.

If a microprocessor controlled reset is required as well, then the circuit in Figure 7-2 should be used.

No other hardware is needed, but the RCD network should always be used for a clean power-on reset.

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  • \$\begingroup\$ Thank you for your answer. Could you please tell me but why is a reset is required after powering up? If the power is stable and takes good time to rise. And once it rises and stable, the pins are latched and then the reset is released, at this time everything is fine right? Why Reset is required after power-up again? \$\endgroup\$
    – user220456
    Commented Feb 15, 2023 at 10:04
  • \$\begingroup\$ Resetting again after power on is not required unless the strapping options are to be changed depending on the application or perhaps if noise or interference has altered the configuration in some way that resetting can recover, without powering down. \$\endgroup\$
    – RussellH
    Commented Feb 15, 2023 at 10:14

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