I am planning to use the IR2104 half-bridge driver in a project to control the intensity of a fairly powerful LED array using the PWM output from a Raspberry Pico.
The main question I have is how to size the capacitors that are present in the IR2104's typical connection schema.
I have made a diagram of my full circuit as it is planned for now, taking into account the comments I have received so far. My computations for the capacity CB of the B capacitor are detailed at the end of this post.
The LED panel is composed of 4 LEDs in parallel, with a power rating of 50 W at 12 V each, but this is largely overestimated as I measured the 4 LEDs to draw only 3 A all together in parallel at 12 V constant voltage. I am planning to overdrive these LEDs, but with a very finely tunable PWM (hence the two potentiometers). I might also add a thermal probe later if this works. This is just an educational project for me.
I would like to use a fairly high frequency for the PWM (the Pico has PWM between 7 Hz and 125 MHz), I am hoping I can reach 100 kHz.
I guess that the capacity of the capacitor that is connected between VCC and COM (on the left on the manufacturer's diagram, D on my diagram) is not very important as it is just a decoupling capacitor. Am I correct?
I am more unsure about the capacitor between VB and VS, that I denoted B on my schema. Does its capacity have an impact on the maximum achievable switching rate?
I am not totally sure I understand the purpose of the capacitor that I denoted C either, nor which capacity it should have.
I am planning to use an IRF3205 N-channel MOSFETs.
Main edit of this post, computation of CB
Based on the comments I received and using the formula detailed in the an answer that was suggested, since QG is 146 nC, IG is 100 nA (not sure I'm reading the right cell for this one value, I took the value of IGSS, "gate to source forward leakage"), and I'm aiming for a 100 kHz switching frequency, I compute the following:
$$C_B \ge \frac{146~\mathrm{nC} + 100~\mathrm{nA} \cdot \frac{1}{100~\mathrm{kHz}}s \cdot B}{\Delta_{V_B}}$$
where \$B\$ is the duty cycle and \$\Delta_{V_B}\$ is the acceptable voltage drop at the gate of the capacitor, which I will assume to be 0.1 as in the answer I am taking the inspiration from, which sounds reasonable because my micro-controller will output 3.3 V and the IRF3205 starts to turn on at VGS(th) = 2 V and the 3.3 V will only be the voltage applied to the gate for the first cycle if I understand correctly, before the bootstrap capacitor has had a chance to charge from the high voltage source of the load.
So the "worst case scenario" for this equation would be with \$B\$ = 1 so I should be able to determine CB with:
$$C_B \ge \frac{146~\mathrm{nC} + 100~\mathrm{nA} \cdot \frac{1}{100~\mathrm{kHz}}s}{0.1~\mathrm{V}}$$
The units in the equation are homogeneous, but the equation will give me CB in \$\frac{~\mathrm{nA} \cdot ~\mathrm{s}}{~\mathrm{V}}\$ which are just nF, so I get:
$$C_B \ge \frac{146 + \frac{100}{100000}}{0.1} = 1460.01~\mathrm{nF} \approx 1460~\mathrm{nF} = 1.46~\mathrm{\mu F}$$
Thus I am planning to use a 2.2 μF capacitor for B because that is the nearest capacitor value I have that is greater than the computed result.
Does that seem reasonable to you?