Is there a circuit design where if the input is high (at any length of time), the output will only be one cycle at a fix amount of time?

I'm currently working on a capacitive touch switch (I'll use CTS as an abbreviation) using the CMOS 4000 series and I'm trying to turn it into a latching switch by connecting it to a T flip-flop. So whenever I trigger the CTS, its output will be the input or the T of the t flip-flop. It works, but not properly.

My ideal outcome on should be like this: at any length of T and the CLK have an odd number of cycles, the output put will always be the opposite of its initial state.

What's probably happening on t flip-flop

The problem is that whenever I trigger the CTS, the output state sometimes doesn't change. I thought this was because sometimes the T comes low with the CLK in an even number of cycle. I can't predict the CLK because it was too fast, around 100kHz.

So I thought that that if only there is a circuit between CTS and T flip-flop that when the CTS is triggered (at any length of time), this certain circuit will produce a single wave that is in synch with the CLK of the T flip-flop and will become the T of the t-flip-flop.

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  • \$\begingroup\$ electronics.stackexchange.com/questions/654021/… \$\endgroup\$
    – brhans
    Feb 17 at 14:18
  • \$\begingroup\$ It is not self-evident why your output is defined this way, but I suppose ;count duration, start, and stop CTS , & noise filter, must be defined. In order to sync an odd count , T must be sync’d to an odd sub-clock like /3. Your real problems might be stray line noise filtering modulated by touch proximity, which requires a better solution from a better question. \$\endgroup\$
    – Hoagie
    Feb 17 at 18:41
  • \$\begingroup\$ Two questions. 1. Is it required that the firs half-cycle of the output be complete? IOW, what happens if the T edge arrives in the middle of a clock cycle? 2. The left diagram show the output ending in the high state. How does it get back to the low state for the next event? \$\endgroup\$
    – AnalogKid
    Feb 17 at 19:02
  • \$\begingroup\$ @AnalogKid 1. Nope, i just need it to change its initial state.The way T flipflop works is that it needs the rising edge of the clock aligned with the high input. So it wont toggle when T arrives at the middle of the cycle. Unless it was sustained enough that it reach the rising edge of the next cycle. \$\endgroup\$
    – Igcasan
    Feb 18 at 15:03
  • \$\begingroup\$ 2. T flipflop toggles the output when the rising edge of the clk is aligned with the high input. To change it back to low state, input goes high again, and make sure that the last rising edge in the duration of the high input must be odd, otherwise it wont change. \$\endgroup\$
    – Igcasan
    Feb 18 at 15:09

1 Answer 1


The following link is what I was looking for: it's a Rising edge triggering Monostable Circuit.

The video shows that its input can be longer than the output, and the pulse length of the output is adjusted. It also uses a 555.


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