My digital level flattened its 9 V battery within 2 weeks of little use, so I measured its standby current which came out at nearly 2 mA!

I took the cover off was shocked to see the battery connected directly into 5 V linear regulator (AMS1117) that is always operating.

From the datasheet I see it's got a quiescent current figure of 5 mA which to my understanding represents a standby, no-load current value.

Am I correct that this is a horrifying circuit design, and it's actually doing pretty well to come out at just under 2 mA - even though I don't deem this an anywhere near acceptable standby current for such a battery operated device?

Here's what the PCB looks like, with the battery connected in the upper-right:

Digital Level PCB photo with power supply circled

I'm keen to understand how a circuit like this could be improved. To provide a starting point, I recently designed this circuit to perform momentary power latch-on as follows:

  • VCC is around 14 V
  • The controlled power output is in the bottom-right - this powers the circuit
  • Power is activated by grounding the "EN" connection, which lets power flow to the circuit via the PNP (Q2)
  • A microcontroller drives "PWR_ENABLED" high to 3.3 V while operating to keep "EN" grounded through the NPN (Q1)
  • The microcontroller can ground/float this pin to turn the power off.

(note all the "extra" components are essentially protection against supply spikes and inrush current)

Power latch - on circuit

Are there any flaws in my approach to this problem?

One of the things I'm yet to implement is how I can allow the microcontroller to sense the state of the "EN" - ie, whether the momentary power button is pressed while the circuit is already powered. I essentially want to use the EN input to activate my circuit, but also allow the processor to use this as an input - which I can't do with my design as it stands.

  • \$\begingroup\$ FYI your PNP is upside down. Also, with no annotations (Q? etc) it is difficult to refer to specific components \$\endgroup\$ Feb 26, 2023 at 10:00
  • \$\begingroup\$ Hah I should have got you to review my circuit before manufacturing it... had to solder the transistor sideways and use a jumper to get a functional board after finding that problem the hard way. Sorry about the schematic, it's not up to date. \$\endgroup\$
    – Warrick
    Feb 26, 2023 at 11:47
  • \$\begingroup\$ I've updated the schematic to the latest version... has a bunch of irrelevant components to the question now though. \$\endgroup\$
    – Warrick
    Feb 26, 2023 at 11:55
  • \$\begingroup\$ when the microcontroller is OFF, PWR_EN is floating. So, better to have say 1Mohm pulldown on that pin to ground to define it. If the microcontroller supply is ON that means that EN is definitely 0. So, why do you want to connect EN to the microcontroller? Isn't it redundant? \$\endgroup\$
    – sai
    Feb 26, 2023 at 14:05
  • \$\begingroup\$ what is the yellow square at top of the schematic diagram? \$\endgroup\$
    – jsotola
    Feb 26, 2023 at 16:59

1 Answer 1


For connecting EN to the micro-controller, I tried putting together 2 schemes. Basically we need to create a replica of the EN signal. One going to this power latch and other going to the micro-controller.

Using a DPST switch This uses a DPST push button switch

Using MOSFETS This uses MOSFETS instead

Apart from this, like mentioned in the comments, consider adding 1M ohm resistor from PWR_EN to ground to avoid floating net when micro-controller is OFF.

  • \$\begingroup\$ Very nice! I like the simplicity of using a DPST, but would go with the mosfet approach to limit the wire run to the button at 1 conductor. \$\endgroup\$
    – Warrick
    Feb 27, 2023 at 9:23
  • \$\begingroup\$ My question really should have been split into 2 - do you have any thoughts on the first half? I'm wondering if my digital level has a poorly designed activation circuit, leading to the unacceptable standby current draw. \$\endgroup\$
    – Warrick
    Feb 27, 2023 at 9:24
  • \$\begingroup\$ The structure as such looks ok to me. Have you checked biasing conditions particularly for Q2? Have you estimated the magnitude of the inrush current and whether Q2 can carry that current? Max peak current spec of Q2 is 200mA as per datasheet. May be the transistor Q2 may burn out if inrush current is more than 200mA. I tried calculating and inrush max came to 0.5A. You could may be increase R13 to bring this within spec. I am not very confident of my calculations though. What is the load current of your circuit? It should be <100mA because I think Q2 max allowed is only 100mA. \$\endgroup\$
    – sai
    Feb 27, 2023 at 11:25
  • \$\begingroup\$ The inrush current would have been much more than 0.5 A due to the large capacitors. I've handled that via R14 though, a 10 ohm resistor in series with everything. It's a small load circuit, but has a buck converter IC that would keep exploding when the supply voltage from my cheap bench supply would inductively spike to 40+ V due to the insane inrush current. That's why I added R14, which also allows TVS diode D1 to completely dissipate any spikes. \$\endgroup\$
    – Warrick
    Feb 27, 2023 at 20:25
  • 1
    \$\begingroup\$ Yes, I understand that you added R14 for that reason but you'll need to ensure that inrush current is small enough for Q2 to survive. If you violate the max current spec of q2, it may not instantaneously die, but it may be progressively degrade giving up some day in future. \$\endgroup\$
    – sai
    Feb 28, 2023 at 1:58

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