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In Horowitz - Hill's The Art of Electronics, 2nd edition, paragraph 2.03, an emitter follower with an npn BJT is presented. Figure 2.8 uses a symmetrical power supply:

schematic

simulate this circuit – Schematic created using CircuitLab

If Q1 is on, a 0.6 V voltage drop for the forward-biased base-emitter junction is assumed. It is stated that in an emitter follower the npn Q1 transistor can only "source" and not sink current.

Assume that the input voltage Vs is a 20 V amplitude sinusoid, so between +10 V and -10 V.

Vout «can swing to within a transistor saturation voltage drop of Vcc (about +9.9V), but it cannot go» below -5 V. «That is because on the extreme negative swing, the transistor can do no more than turn off», which happens when Vs reaches -4.4 V (and consequently Vout equals -5 V).

Why? No values are mentioned as regards the emitter current, and consequently about the voltage drop across R1.

I would expect that Q1 turns off when Vs reaches -10 + 0.6 V = -9.4 V. At this point, when Vs further decreases, the voltage across the base-emitter junction of Q1 begins to decrease below the junction threshold, Q1 turns off and, when this occurs, Vout is at -10 V, because no current flows across R1.

The book then ends with: «Further negative swing at the input results in backbiasing of the base-emitter junction, but no further change in output». This is reasonable, but I can't understand the above point.


Note: this is not a homework. I am an enthusiast trying to read (and to understand something from) the mentioned book.


Edit: Is this the voltage divider?

schematic

simulate this circuit

But this would be valid if there were no other currents in this loop. Instead, the BJT Q1 injects current in the node Ve. There's another branch of the circuit connected to node Ve, so I can't recognize here a pure voltage divider.

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  • \$\begingroup\$ Take a look here electronics.stackexchange.com/questions/560681/… and here AOE circuit electronics.stackexchange.com/questions/271794/… \$\endgroup\$
    – G36
    Commented Feb 27, 2023 at 14:35
  • \$\begingroup\$ In fig 2.8 we have a 1k load resistance connected between the emitter terminal and the GND. And this forms a voltage divider and makes VE_min = -5V. \$\endgroup\$
    – G36
    Commented Feb 27, 2023 at 14:40
  • \$\begingroup\$ @G36 The extra 1k Rload resistor can or can not be present. However, I still have some doubts. Assuming that Rload is present, I edited my question with an attempt to recognize the voltage divider. \$\endgroup\$
    – BowPark
    Commented Feb 27, 2023 at 15:08
  • \$\begingroup\$ Simply put, this is a unipolar driver so load must be to a lower voltage or else you need a bipolar push-pull driver \$\endgroup\$
    – Hoagie
    Commented Feb 27, 2023 at 15:37
  • \$\begingroup\$ Don’t confuse the term bipolar in the junction with PNP+NPN in the circuit or other contexts. \$\endgroup\$
    – Hoagie
    Commented Feb 27, 2023 at 17:05

3 Answers 3

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The problem is that NPN transistor can only source ( injects) current into the node.

Try to calculate the current direction at the VE node when VE voltage is equal to -6V.

schematic

simulate this circuit – Schematic created using CircuitLab

As you can see we can get -6V at the emitter only if the transistor were able to "sink" (absorb) 2mA of current. And this is not possible.
The transistor current drops to 0A when Ve reaches -5V. In that case, IL = I_R1 and Ie = 0A (transistor is cut-off).

schematic

simulate this circuit

Do you see it now?

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  • \$\begingroup\$ Yes, now I can understand your point. Thank you! \$\endgroup\$
    – BowPark
    Commented Feb 28, 2023 at 18:56
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The problem

It is not related to (NPN) transistor - neither that the transistor cannot sink current, nor that the base-emitter junction is "on" at Vs > 10 V, nor that it breaks down when it is reverse biased at Vs < -5 V. These transistor phenomena are interesting in themselves, but in this case they are details which distract us from revealing the main idea.

Short answer

The problem is purely electrical and related to rheostat and potentiometer devices when split supplied. Its essence is that the simple 1-transistor amplifier stages (like the AOE emitter follower) are implemented as imperfect "potentiometers" in which only one of their parts is a variable "resistor" (transistor) and the other is a constant resistor. When the transistor is off, the resistance of the constant resistor remains and forms a voltage divider with the load resistance. As a result, the output voltage cannot reach the power supply rails.

This problem is solved in complementary transistor stages implemented as true "potentiometers" in which both parts are variable "resistors" (transistors). When the one of transistors is off, the other is on and no voltage divider with the load is formed. So, the output voltage can reach the power supply rails.

Building the circuit

Let's take a closer look at this phenomenon by mentally transporting ourselves to the 19th century where there were no transistors and tubes, only constant and variable resistors. I will do this here using my favorite step-by-step building technique.

STEP 0: The task

It is to make a device that can regulate the voltage within the limits of the power supply. In electrical circuits, such devices are called "potentiometers"; in electronics they are called "amplifiers".

STEP 1: Unloaded variable resistor

Positive supply voltage 10 V. The first idea that comes to mind how to get a variable positive voltage is to include a (1 k) variable resistor (R1 aka "rheostat")) in series with the supply voltage source (V+). After runnig the DC simulation below, we hover the mouse over the resistor or output and set various values ​​of the resistance R1 by the CircuitLab parameters. We see what we expected - whatever value of the resistance R1 we set, since no current flows through the resistor, there is no voltage drop across it and the output voltage is equal to the supply voltage. Figuratively speaking, the resistor has easily "pulled" the output up to the positive supply voltage.

schematic

simulate this circuit – Schematic created using CircuitLab

This configuration corresponds to an emitter follower implemented by an NPN transistor (acting as R1) with "open emitter" (without a resistor connected in the emitter).

Negative supply voltage -10 V. Similarly, to get a variable negative voltage, we include a (1 k) variable resistor (R2) in series with the negative voltage supply (V-). As above, we see that when varying R2 the output voltage does not change and stays equal to the supply voltage. Figuratively speaking, the resistor has easily "pulled" the output down to the negative supply voltage.

schematic

simulate this circuit

This configuration corresponds to an emitter follower implemented by a PNP transistor (acting as R2) with "open emitter" (without a resistor connected in the emitter).

After the two experiments, we conclude that it is not possible to change voltage through only one (pull-up or pull-down) varying resistor; there is a need for another resistor "pulling" the output in the opposite direction.

(By the way, the US "zigzag" resistor symbol is very suitable for such an analogy because it evokes the association of a stretching spring.)

STEP 2: Loaded variable resistor

Positive power supply. The problem is solved if the load (RL) has some resistance (1 k) so a current flows through the variable resistor R1. The load acts as a "pull-down" resistor that, in combination with the "pull-up" R1, forms a voltage divider.

schematic

simulate this circuit

If we run a DC sweep simulation where, for example, R1 varies from 0 to 10 k, we will see that the output voltage varies from V+ almost to 0 V. The curve is non-linear, but that does not matter in this case.

Graph_1

This configuration corresponds to the NPN emitter follower with a resistor load in the emitter.

Negative power supply. Similarly, in the negative voltage supplied configuration, the load acts as a "pull-up" resistor that, in combination with the "pull-down" R2, forms a voltage divider.

schematic

simulate this circuit

In the DC sweep simulation, R2 varies from 0 to 10 k and the output voltage varies from V- almost to 0 V.

Graph_2

This configuration corresponds to the PNP emitter follower with a resistor load in the emitter.

STEP 3: Imperfect "potentiometer" unloaded

When there is no load connected (open circuit) or it has extremely high resistance or just in case, it is a good idea to connect a constant resistor R2. Thus we have assembled an "imperfect potentiometer" by connecting a rheostat and resistor in series.

schematic

simulate this circuit

This configuration corresponds to the NPN emitter follower without an external resistor load connected.
When running the DC sweep simulation, we see that the output voltage almost reaches the negative supply rail.

Graph_3

schematic

simulate this circuit

This configuration corresponds to the PNP emitter follower without an external resistor load connected.
Now the output voltage almost reaches the positive supply rail.

Graph_4

STEP 4: Imperfect "potentiometer" loaded

But if we connect a load (this configuration corresponds to the NPN emitter follower with an external resistor load connected)...

schematic

simulate this circuit

... another problem appears - we cannot reach the negative rail only by increasing R1 even up to infinity (open circuit) since R2 remains and forms another voltage divider with RL.

Graph_5

Similarly, in the configuration corresponding to the PNP emitter follower with an external resistor load connected...

schematic

simulate this circuit

... we cannot reach the positive rail only increasing R2 even up to infinity (open circuit) since R1 remains and forms another voltage divider with RL.

Graph_6

We can somewhat solve the problem by enormously reducing the resistance of the constant resistor, but this will enormously increase the current. We need some smarter solution...

STEP 5: True potentiometer unloaded

We easily arrive at the clever idea to make both resistors variable and change their resistances simultaneously and in opposite directions. In the 19th century, they called its implementation "potentiometer" and now we call it "complementary stage".

schematic

simulate this circuit

What a great idea! When we move the wiper, the total resistance and, accordingly, the current remain unchanged; only the output voltage linearly changes... and what is most important is that the output voltage reaches the supply rails. Let's see it in the DC sweep simulation where we set as a linear changing parameter the position of the wiper (transfer ratio 0 < K < 1).

Graph_7

STEP 6: True potentiometer loaded

Now let's load the true potentiometer. I have set three values of the potentiometer resistance R.P (100, 3.3 k and 10 k) as a second parameter in the DC sweep simulation to see its impact.

schematic

simulate this circuit

As you can see, the transfer curve is completely linear at R.P = 100 ohm since the (1 k) RL impact is negligible then. And again, what is most important for us, is that the output voltage always reaches the supply rails.

Graph_8

Returning to the present

Having uncovered the basic idea in the 19th century electrical realm we can return back to our 21st century electronics realm and investigate the transistor implementation - how a base-emitter junction transfers the input voltage (when > 10 V) directly to the output of the emitter follower, what happens when the junction breaks down (when Vin < -5 V), etc.

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Edit: It was pointed out that your lower potential is -10V, and everything I've written assumes 0V! Sorry about that. The principles are sound, though.

The only useful working input range for this emitter follower is \$0.6V \le V_S \le 10.6V\$. Let me explain why.

Take the case where \$V_S < 0.6V\$. In that state, the base-emitter junction is not forward biased, and no base current can flow. The base-emitter junction is just a P-N junction, a diode, after all. With zero base current, you have zero collector or emitter current. With current in R1 at zero, the voltage across R1 is zero, and the output is stuck there, at 0V, even if base potential continues to fall.

This is true only if \$V_S\$ is not too negative; later I will explain why the rules change if \$V_S < -5V\$.

Now see what happens when \$V_S>10.6V\$. You have to remember that the base-collector junction is also another P-N junction, another diode, whose cathode is the collector. If the base rises in potential above 10.6V, then that diode becomes forward biased, and begins conducting a lot of current. It becomes a fight to the death between the source of \$V_S\$ insisting that it be 12V (for instance), the collector-emitter junction insisting on having no more than 0.6V across it, and the 10V power supply insisting that it be exactly 10V. The strongest wins, the weakest might get hurt.

The last condition to be aware of is when \$V_S<-5V\$. That is, the base-emitter junction is very strongly reverse biased. The emitter is usually unable to drop below 0V, but that base emitter P-N junction also happens to be a zener diode (due the doping of the junction materials necessary to make it work as a BJT), which means it has a limit to how far it can be reverse biased, before it begins to breakdown, and conduct.

The actual reverse breakdown voltage of the base-emitter junction varies from device to device, but -5V is considered typical, and something you should take care to avoid.

When you try to bring the base further than 5V below the emitter, that junction breaks down and begins to conduct, dragging the emitter with it. So for \$V_S < -5V\$, the emitter potential follows, so that \$V_E = V_S + 5\$.

Again, that value of 5V varies wildy from device to device, and is usually actually more than this, but the state of base-emitter reverse breakdown is generally undesirable.

Reverse breakdown is a serious problem if the emitter is tied directly to ground, since you have a fight between the source of \$V_S\$ trying to lower the base potential below -5V, while the base-emitter junction clamps the base at -5V. In the emitter follower, though, the emitter resistor R1 gives some flexibility to emitter potential, and R1 will determine the current that ultimately flows.

In the context of your question, a 20V peak sinusoid would swing between +20V and -20V, and what happens when it exceeds 10.6V or drops below -5V depends entirely on how "strong" the source of that signal is. In other words, everything depends on the "source impedance" of \$V_S\$. If it's low, and able to source and sink lots of current, the transistor will suffer, if it's a high impedance source, then nothing will break, and you just get some clipping at the top, and some strange artifacts when \$V_S < -5V\$.

Here's a simulation of the output when a 20V sinusoidal source of \$V_S\$ has an impedance of 1kΩ (same as R1), and the transistor's base-emitter junction breaks down at -5V. The CircuitLab simulator does not account for reverse breakdown of the base-emitter junction, so I've had to model it with a zener diode and a regular one:

schematic

simulate this circuit – Schematic created using CircuitLab

enter image description here

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    \$\begingroup\$ Notice the negative supply (Vee = -10V) in the example given in AOE. \$\endgroup\$
    – G36
    Commented Feb 27, 2023 at 16:35
  • \$\begingroup\$ @G36 Oh yeah! Didn't see that. Well, I hope OP can adjust! \$\endgroup\$ Commented Feb 27, 2023 at 16:38
  • \$\begingroup\$ Thank you so much for all your effort and your considerations. This is a very useful integration to the other answer. Also the textbook deals with the possible low breakdown voltage of the base-emitter junction. \$\endgroup\$
    – BowPark
    Commented Feb 28, 2023 at 18:57

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