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I know that in the MII interface, the clock is always sent from PHY to MAC irrespective of TX or RX? Can someone explain me on why TX and RX, the PHY should send the clocks? Like for the RX connections, since the PHY is sending the RX data to the MAC, the PHY is sending the reference clock. But on the TX lines, the MAC is sending the data to the PHY. In this case, shouldn't the MAC send the clock to the PHY? What's the logic behind this?

Also, when we move to the RMII interface, why there's a change from two clocks to one reference clock? What's the logic behind this move?

Please explain.

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  • \$\begingroup\$ I suppose the idea is that the clock is part of the physical layer and the PHY controls the physical layer. By the way, it's really important in GMII because in gigabit ethernet, only one device generates the clock and it might not be your device! \$\endgroup\$ Mar 7, 2023 at 19:51

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Yes, the PHY sends the TX and RX data clocks.

The PHY still needs a reference clock or bit clock from somewhere, so it could have a reference clock input from a crystal oscillator or contain the oscillator so it just needs a crystal, and typically will contain a PLL to generate the symbol clock from the reference.

The reason why is in the name of the MII, it is a Media Independent Interface, so the interface does not depend on the media.

The PHY has to know how it is connected and at what speed to another PHY, like 10M or 100M link, and so it also knows to generate correct clocks for the MAC.

The MAC does not need to know or care what media or link speed the PHY uses. It just listens or transmits at the clocks given to it regardless of the PHY. For a common MCU, it might not even have correct clocks or have any means of generating correct frequency clocks for a PHY, or even if it does, the clocks may be out of specs for reliable operation, if the clocks are generated with a PLL and it just has too much jitter so it can't be used, and so the PHY needs a proper low-jitter high precision clock source anyway.

RMII just reduces the bus pin count and PHY still needs to generate correct clocks for MAC like before. To reduce pin count, why use two clocks when a single clock can be used for the job. And for RMII, it's not really a data clock any more that is generated by PHY, it's just a common reference clock input to both MAC and PHY, although the PHY itself can contain the reference clock oscillator or PLL buil-in so you don't have to separately generate the reference clock to both devices as clock generation is integrated to PHY.

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  • \$\begingroup\$ Thank you for your answer. So, consider the TX lines between the MAC and the PHY. On the TX lines, data is being transferred from the MAC to the PHY. So, how does the transmission start? Does the PHY sends the TXCLK first. Upon receiving the TX clock, the MAC gets to understand the frequency of the TXCLK and then transmits the data on the TX lines or how does the transmission of data happen on the TX lines? Like could you explain me the step by step sequence of clock and data movement on the TX and RX lines with respect to CLK to understand a little more clearer, please? \$\endgroup\$
    – user220456
    Mar 8, 2023 at 2:13
  • \$\begingroup\$ That is now a different question how MII works, not a question why there are two clocks. Diagrams how the MII signals are used for data transmission are described in every PHY/MAC data sheet in great detail. \$\endgroup\$
    – Justme
    Mar 8, 2023 at 5:17
  • \$\begingroup\$ can I then post a new question on the above? I am still not clear. \$\endgroup\$
    – user220456
    Mar 8, 2023 at 5:48
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On both RMII and MII the controller on the MAC is the one initiating requests and pulling data and setting registers on the PHY. The PHY is kind of dumb, it's a level 2 device and doesn't really know what's going on. The MAC is the smart device with the software running on it.

MII has more pins, they have a TX clock and after a request is initiated by the controller is data sent over the TX lines. MII works at 25MHz so it's easier for slower processors to send commands.

RMII they are trying to save pins, so not having two clock lines is better. RMII is also faster so a 50MHz clock rate needs more attention to PCB layout and capacitance.

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