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The purpose of the below circuit is to keep the output low during the ramping up period of V1.

schematic

simulate this circuit – Schematic created using CircuitLab

What is the purpose of Diode D1 and D2 in divider?

  1. Is it to ensure slow turn off when V1 goes zero?
  2. Or is it to alter the divider ratio somehow? The extreme high divider ratio between R1 and R2 also is confusing.
  3. Is the value C1 typical? Is it intended for delaying effect or just for noise filtering?

When V1 ~ 1.5V => Vgs( M1) ~Vgs(th)=1V (Ignoring diode drop) -> Doesnt make sense as V1 is not yet stable and still ramping.

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3 Answers 3

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The idea may be to prevent the output (drain of M1) from going low before the input reaches a certain minimum voltage (around 4V in this case) even if the input voltage increases very slowly.

schematic

simulate this circuit – Schematic created using CircuitLab

The reason for that is going to be related to the actual purpose of this circuit, which is undisclosed.

It does ensure that the M2 transistor will turn 'on' producing a low output (for some period of time) regardless of how slowly the input voltage increases. If the purpose is to generate a reliable reset pulse, it's not a very good circuit.

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As answered by Spehro, this circuit seems to generate a reset pulse (at the drain of M1) when voltage V1 is below a certain threshold (a crude POR circuit). The purpose of the cap is to provide a delay. Assume a case where V1 ramps from 0 to 10V very fast (say in 1ns). If the cap were not there, drain of M1 could be low always and hence there is no reset pulse or there would be may be a very small reset pulse that is practically useless. Adding a cap ensures that you will get a finite reset pulse width as defined by the RC time constant.

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What my prof told me about the diode implementation is as follows:

It will ensure the gate of the MOSFET is not all triggered till the input voltage reaches 2.8V to 4V (4*Vf). In the actual circuit, we had 4 diodes. Note: Vf =0.7V to 1V.

Unlike a resistive divider, where you would always experience a scaled down version of input voltage howsoever low it be.

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