# Compensation for op-amp integrator circuit

1. Why is a compensation resistor used in parallel with the capacitor in an integrator op-amp integrator circuit (with a capacitor in feedback and a series input resistor)? What is the task of that resistor?

2. Why can't the integrator deliver the expected output without a compensation resistor (parallel to the capacitor) with the DC offset voltage?

Consider an inverting amplifier, with input grounded: simulate this circuit – Schematic created using CircuitLab

Ideally, $$\I_{BIAS}=0A\$$, but in practice it is not. With FET input op-amps $$\I_{BIAS}\$$ can be very small, picoamps, but there will always be some bias current into or out of that input.

Ideally, $$\V_{OFS}=0V\$$, but in practice it is not. Some amplifiers can get close to zero, but all op-amps have some amount of input ofset voltage.

Both of these factors contribute to an inherent side effect of these non-ideal properties of real op-amps: when the input is grounded, $$\V_{IN}=0V\$$, the output, which should also be zero, is not.

We are usually taught that negative feedback causes an op-amp to adjust its output to whatever value is necessary to bring the difference between its two inputs to zero, so that $$\V_P = V_Q\$$, but this assumes an ideal op-amp, with zero input offset voltage. What actually happens is that the output settles at the voltage which would produce $$\V_Q - V_P = V_{OFS}\$$.

We are also taught that $$\I_{BIAS} = 0A\$$, so that (by Kirchhoff's Current Law, KCL), $$\I_1 = I_2\$$. Again, in reality, this isn't true, and $$\I_{BIAS}\$$ has the effect of causing the output to settle at a slightly non-zero value, just enough to compensate for this non-ideality.

Consequently, there will always be some current flowing in R1 and R2, even when the input is zero. Also, even if the input is a perfectly symmetrical signal, with an average potential of exactly zero, average input and feedback current will not be zero.

This is a big problem for the integrator: simulate this circuit

If, on average, current $$\I_2 \ne 0\$$, then that current will cause capacitor C1 to charge up over time. The op-amp, in response, will continuously and gradually increase (or decrease) its output, to keep it's input difference close to zero, until it saturates.

Even with a perfectly symmetrical input waveform, this problem of gradual accumulation of charge occurs, until the op-amp saturates, since average current through C1 is non-zero.

Putting a large-value resistor in parallel with C1 will provide a route around the capacitor for current, instead of through the capacitor. You might also view such a resistor as a way of "bleeding" charge away from the capacitor, preventing the voltage across it from continuously rising.

If I redraw the circuit with that "bleeder" resistor in place, I can annotate some currents and voltages, and better illustrate the concept. For simplicity, I'll ignore input bias current, and focus only on the effect of the input offset voltage of 2mV: simulate this circuit

The circuit will settle into an equilibrium, where the the capacitor has charged to 200mV. That voltage is also across the resistor, and so there will be $$\\frac{200mV}{100k\Omega} = 2\mu A\$$ of current through R2. All that current flows via R2, and none of it via C1. You could remove and reinsert C1, charged to 200mV, and nothing would happen.

With no current through C1, it isn't charging or discharging, and the circuit has reached steady state, quiescence, its DC operating point. If R2 were not there, though, that current of 2μA would have to pass via C1, causing it to continuously charge, never attaining a steady state.

If you're referring to the typical textbook op-amp integrator (with a capacitor in feedback and a series input resistor), then that resistor has, mostly, the function to provide a DC path between input and output to properly bias the input and and output of the op-amp.

If that capacitor weren't there, the input node would be undefined at DC as well as the output.

• However, such a resistive feedback is necessary only when the integrator is used as a "stand-alone" circuit. Unfortunately, it disturbs the wanted integrating operation. But if the resistor is part of an overall negative feedback loop (as is the case for some filters/oscillators or other control loops) this resistor is not required.
– LvW
Mar 9 at 9:49