I am currently working on frequency multiplication with a PLL circuit.
I want to give it an input frequency of 10 kHz to 100 kHz and I want to get 160 kHz to 1.6 MHz from the VCO output. That's a multiplication factor of 16.
I found some ICs such as the CD74HC4046 and the MC14046B, but I can't arrange fmax-fmin. What I mean is, what range should I consider? 10 kHz to 1.6 MHz or 160 kHz to 1.6 MHz? Should I consider a low-pass filter cut-off frequency 1.6 MHz or 100 kHz? I found a CD74HC4046 SPICE file, but I don't know this file works well. I am still trying to find a good solution with the IC's datasheet. Can you give me some design tips about PLLs?