Disclaimer first: what you are doing is dangerous, and will kill you if you so much as look at it the wrong way. Everything I say here is for your education, not because I think you should continue with this project, because I actually think you should not. If you implement anything I suggest here, and something bad happens, like a fire, or damage or injury, that's on you.
Your rectifier setup produces 340V DC, not 240V. That means your H-Bridge is applying +340V, or -340V across the load. I doubt this is what you intended.
Put a fuse somewhere in the path of mains current to protect everything.
The upper transistors in the bridge have common drains, and are operating as source followers. The name says it all, source potential follows gate potential, but a few volts lower. That means +12V at the gate produces about +9V at the source, not +340V. The consequence is that the remaining 331V are between drain and source, and anything over a few milliamps of current through that transistor will fry it very quickly. For example, \$P = IV = 10mA \times 331V = 3.3W\$.
As source followers, not only do you need +343V at the gate to switch them fully on, you also need near 0V to switch them fully off. That's a big ask. Your best bet is to replace both upper transistors with P-channel devices. Then you will require their gates to be +340V to switch them off, and +330V or so to switch them on, a difference of only a few volts.
The lower transistors do not have this problem, because they are connected in "common-source" configuration. The existing arrangement applying 0V or +12V to their gates is sufficient.
I'll illustrate this behaviour difference below. Left is common-source (as used by your lower two transistors), and right is common drain (or source-follower, the configuration employed by your upper transistors):
simulate this circuit – Schematic created using CircuitLab
Here are plots of the input IN (blue), OUT1 (common-source, orange) and OUT2 (source-follower, tan):
The important features of the common-source setup (orange output signal) are:
The output is more "digital", on or off, and extends all the way to each supply potential.
The output is inverted, with respect to the input. Low input, high output, and vice versa.
The main points to note for the source follower (tan output) are:
The output is always 4V below the input, "following" variations in input.
The output is not inverted with respect to the input.
The transistor is never fully on. the output is unable to reach +20V unless the input rises well beyond 20V.
The reason you are tripping breakers is almost certainly because you are failing to ensure that there is never the condition where two MOSFETs on the same side (the two FETS down the left side, or the two right-hand ones) are simultaneously on (even only partially). If that happens, you have a very small resistance across your 340V source, permitting huge currents to flow. This is called shoot-through.
This problem is exacerbated by the fact that your circuit switches MOSFETs off very slowly, causing them to spend considerable time in some intermediate, partially conductive state. This is because gate capacitance in these devices is 2nF or worse, and combined with 10kΩ gate resistances, the gate discharges over a period of about \$R\times C = 2nF \times 10000\Omega = 20\mu s\$. At a guess, I'd say that if you switch these MOSFETS on and off at more than a kilohertz or so, they are going to spend a large percentage of their time partially conductive, causing shoot-through, and getting very hot.
Those issues aside, here's an implementation employing P-channel MOSFETs at the high side:
simulate this circuit
It uses two independent 12V batteries, one for obtaining gate potentials between +340V and +328V (for the upper PMOS transistors), and the other for obtaining gate potentials between 0V and +12V. The additional battery allows us operate the upper MOSFETs with appropriately high gate potentials.
You will require each transistor gate to be driven by its own opto-isolator, since you may no longer connect the gates of diametrically opposed transistors together. Remember, now they are operating at potentials well over 300V different from each other.
I can't stress this enough: don't ever switch M1 and M2 on at the same time, or even allow their transition from one state to the other to overlap. Same goes for M3 and M4. Avoid shoot-through by ensuring all MOSFETs are off prior to switching any MOSFET on. In other words, introduce a delay between switching MOSFETs off and switching others on, a delay we call "dead-time". I estimate that this delay should be at least 20μs, probably longer due to the slow response of the opto-isolators.
I reiterate that what you are trying to do is dangerous, even reckless. I recommend you don't build my circuit, because I haven't tested it, never will, and make no promises about it. The only reason I answered your question is to illustrate some important concepts you should become familiar with.