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I have a circuit fed by a 4.2 V Li-po battery and want to add a D type flip-flop to turn off the power by a GPIO from my ESP32.

The sequence that I need is the following:

When the battery is connected for the first time, Q is latched high and enables the LDO of the circuit.

When the MCU finishes its tasks, it sends a signal to Q7 to change D status to low, and sends a pulse to Q8 to make a rising edge at CLK and power off the circuit.

With Q low and the MCU shut down, D and CLK go back to high.

When the user presses the button, Q is latched high again.

Beside this, I want to read the button status to run different routines on the MCU.

Can anyone check my schematic and tell me if it is correct?

enter image description here

enter image description here

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    \$\begingroup\$ Hard to say; the schematic is very difficult to read. Text in two orientations, GNDs in all four directions, wires overlapping symbols. Consider a more conventional style: Inputs on the left, outputs on the right, power from top to bottom, and GND always points down. With that plus more space among the components, it should be much easier to see if the schematic is correct. \$\endgroup\$
    – AnalogKid
    Mar 15, 2023 at 21:04
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    \$\begingroup\$ AND - Q7 is shorting a power source directly to a radio antenna that is marked GND. \$\endgroup\$
    – AnalogKid
    Mar 15, 2023 at 21:04
  • \$\begingroup\$ Don't bother designing logic like this. Make the MCU do it. Use a transistor to control the power. Use a delay circuit like you built here to keep the power on for a little bit when the battery is plugged in. Use one of the MCU's outputs to override the delay circuit and keep it on until it's done. The button can reset the delay circuit as well. Only thing that's missing with this idea is you can't read the button state. \$\endgroup\$
    – user253751
    Mar 15, 2023 at 22:36
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    \$\begingroup\$ @AnalogKid thanks for your comments. I change the schematics, is now better for you? \$\endgroup\$
    – Diego
    Mar 15, 2023 at 22:47
  • \$\begingroup\$ @user253751 sadly, I need to read button state, is mandatory \$\endgroup\$
    – Diego
    Mar 15, 2023 at 22:48

2 Answers 2

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If only the button status needs to be detected by the MCU that signal could be better isolated with the arrangement below. Placing another diode in series with SW1 will isolate Vcc2 but still allow SW1 to pull down the CLK line. Use low Vf diodes if needed.

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ Thank you for your comment. What would be the risk if I don't add that second diode? \$\endgroup\$
    – Diego
    Mar 16, 2023 at 12:21
  • \$\begingroup\$ @Diego , In the first circuit by Simon R4 would alter the RC time (R1,C1) if that is important. Also depending on the timing of how each Vcc turns on or off there might be an unfavorable interaction. Simon's second circuit improves the isolation for the CLK line but does add another MOSFET. My circuit above does the isolation passively. But I will add that using too many series diodes can eventually cause problems especially for a 3V design, (as the Vf drops will add up). Using low Vf Schottky diodes can help in those cases. \$\endgroup\$
    – Nedd
    Mar 16, 2023 at 13:39
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The time constant C67 × R41 is 1ms, which is very short. Some power supplies will take many milliseconds to reach their full voltage, and as it stands, the CLK input will rise with the rail, and there's no guarantee that the IC will register a "positive edge". I think a time constant of 20ms or so would be more appropriate.

The MOSFET for RESET will have almost no effect on the potential of the CLK line. If your aim is to allow the MCU to pull CLK low, then it is not correctly connected, and the 10kΩ resistor isn't even necessary.

The DATA MOSFET has the same problem, but worse - it's trying to pull \$V_{CC}\$ low, which is impossible. The D input to the flip-flop cannot possibly ever be low, if it's connected directly to \$V_{CC}\$.

My suggested changes are below, the big ones being control of the D and CLK input potentials. The MOSFETs are configured common-source, which all need a drain resistance to operate like "open-drain" outputs in things like I2C.

schematic

simulate this circuit – Schematic created using CircuitLab

R3 prevents the switch or MOSFET from directly shorting C1, discharging it less violently, in 100μs or so.

R1 initially charges C1 after power on, and again following CLK going low as a result of a button press (SW1), or the RESET signal. R1 is also what permits SW1 and M1 to pull the CLK signal low, so they aren't fighting directly against Vcc.

R2 and M2 operate under the same principle. The flip-flop's D input is held permanently high by R2, unless M2 pulls it low.

I can't think of a way (that doesn't need another transistor) for the MCU to determine if the button is pressed independently of the state of CLK. However, since CLK is under control of the MCU's RESET signal, you should be able to distinguish between CLK being low due to the MCU making it low using RESET, or due to the button being pressed. So just measure CLK.

Do not connect any signal from this circuit directly to a device which may be powered off, like the MCU. The signal itself will try to power the MCU via the MCU's input protection diodes. To avoid this, I use diode D1 and resistor R4. R4 uses the MCU's own positive supply (which comes presumably from the regulator you are controlling with all this) to "pull-up" the MCU input (if the MCU is powered). The MCU input is only is pulled low, by the diode, only when CLK goes low. If the MCU is off, the diode is always reversed biased, and can't pass current.


Update

Nedd helped me spot a potential problem with R4 and D1 above. If there's a chance that MCU power Vcc2 is greater than Vcc1, from the battery, then you might need to be more careful with that CLK signal. Below is the same circuit, with another MOSFET to take care of any issues, just in case. It will invert the CLK signal, but you can deal with that in software.

schematic

simulate this circuit

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  • \$\begingroup\$ In the configuration above C1 will also charge via R4 even before the connection of Vcc1. If the CLK signal needs to be detected by the MCU with out affecting the FF circuit then it needs to be buffered further. \$\endgroup\$
    – Nedd
    Mar 16, 2023 at 11:09
  • \$\begingroup\$ Thank you SImon! that looks great, I will try \$\endgroup\$
    – Diego
    Mar 16, 2023 at 12:19
  • \$\begingroup\$ @Nedd, I thought that too, but the MCU doesn't have power yet! But, you remind me that Vcc2 might eventually be higher than Vcc, a potential problem. I'll have to think about that. \$\endgroup\$ Mar 16, 2023 at 12:41
  • \$\begingroup\$ @Nedd better safe than sorry, I buffered the CLK signal, as you suggested. \$\endgroup\$ Mar 16, 2023 at 13:04

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