tl; dr: single-gate SSI in DIP is inefficient space- and cost-wise, even in the earliest days of ICs. The economics of bigger packages like DIP favor(ed) more integration than just one function in the package.
DIP however is all but obsolete for product design, which is largely SMT now.
Meanwhile, single-gate 'tiny' logic in SMD has emerged as niche use in today's systems to fix system issues that are otherwise composed of larger ICs. This use case and its economics favor the smallest-possible package and very lowest cost, which are only achievable by SMT.
Here comes the history...
In the SSI (Small Scale Integration) era (c. 1965 ~ 1975), it was important to pack as many units into a package as possible. This was true regardless of whether the logic was in DIP or in smaller, more-exotic flatpack type packages favored by military and space systems.
The low amount of integration afforded by SSI at the time also meant that designs of that era were 'seas of gates', from which were constructed complex data paths and control blocks. SSI-era designs often contained dozens, hundreds, even thousands of packages.
It therefore made little sense to have SSI packages that had just one gate, one latch, one flop, etc., since most designs needed more than just one of anything. It would have just wasted space and increased cost to have single-function devices.
The very earliest mass-produced SSI IC, a dual NOR3 used in the Apollo Guidance Computer, came in a 10-pin flatpack. The AGC, which had the approximate compute power of the 6502, used about 4000 of those dual NOR3 ICs.
Even in those go-to-the-moon salad days of IC manufacturing, density mattered.
Speaking of manufacturing, commercial board designs up until the mid-late 1980s were largely through-hole; some even wire-wrap. Also, there was a desire to standardize ICs to specific shapes and formats for easier multi-sourcing and automated assembly. With this in mind, the industry got behind the 100 mil DIP format, and with the leadership of early movers like TI and Fairchild, the DTL, then later TTL families of parts was born and popularized in the easy-to-use DIP format.
As integration continued (c. 1970 ~ 1977), some common datapath constructs migrated from 'roll your own' blocks lashed-up from SSI functions into bigger MSI (medium-scale integration) chips. Standardized MSI datapath-oriented functional blocks came on to the market, such as ALUs, multiplexers, demultiplexers, buffers, byte-wide registers and so forth. SSI continued to be used in control (or 'glue') logic. Still, largely in DIP.
Later, the emergence of programmable logic devices (PLDs) (c. 1978) from MMI and Signetics further supplanted SSI gates in many designs. Boards of the PLD era usually had some MSI datapath elements; while 'glue’ logic consisted of fewer SSI gates as the 'glue' was done in PLDs instead. A classic, late-70's example of PLD-oriented design can be found in the Data General MV/8000, the subject of Soul of a New Machine. You guessed it, still in DIP.
Large Scale Integration (LSI) devices (c. 1975 ~ 1990), in turn, devoured MSI, and to an extent, SSI. A state-of-the-art mid-1980's era LSI-based microprocessor board would have the CPU, RAM, ROM, some peripheral LSIs, maybe a couple of octal buffers a couple of latches, and a PLD or three for glue logic. A cost-reduced design might use SSI instead of PLDs. But, still in DIP and other through-hole like pin-grid array, with SMT beginning to make inroads toward the end of the 80's.
Meanwhile, what was also happening in the late 1970s was the Conway and Mead Revolution (c. 1978), a structured design methodology which, for the first time, made custom ASIC capabilities more widely available to non-semiconductor companies. This meant that a really cost-sensitive, high volume design needing advanced capability would have one or more custom ASICs surrounding a CPU. Yet more SSI (and all MSI) gets absorbed into the ASIC and system LSI's. Classic example: the Apple IIc and later the first Mac, which had the IWM chip that dealt with the floppy.
At the board level, surface-mount, once the exclusive province of military, space-borne, and very-high-volume consumer electronics like calculators, and as mentioned, came to see wider adoption in computer systems as well beginning in the later 1980s. Over time, DIP and other though-hole devices became less convenient and cost-effective.
You can see over time the general shift in the market, with each level of integration supplanting earlier, less-dense technology. The market share, if not outright volume, SSI logic has become ever smaller, with SSI increasingly left nibbling at the margins as a supporting player rather than a central, enabling technology in itself.
Side note: the standard corner pin placement used for TTL adds lead inductance to Vcc/Vss, reducing the device performance. For a time there were (and maybe still are) center-power DIP parts to improve this.
Fast forward to now.
We live in an era where big SoCs, microcontrollers and other large chips dominate most designs. The remaining large off-chip datapaths are either serial (serdes) or DRAM. Even the glue-logic stuff previously done in PLDs has disappeared, all hoovered up by Moore's Law and the march for ever-higher integration, higher speed, and lower cost.
As a consequence,
- Through-hole devices of all kinds, including SSI logic, are largely obsolete, except for hobbyist, prototyping and low-volume specialty work.
DIP logic of any kind isn't cost-effective. Yes, you may love your proto board, but the industry doesn't.
- MSI and LSI have largely vanished.
Almost all the datapath elements as well as glue logic are integrated into the big chips, or implemented in large programmable devices like FPGAs. Not everyone wants to be Ben Eater and 'make' their own CPU from TTL.
Yet despite the seemingly decreased relevance of SSI logic, a need persisted to deal with small stuff at the margins: drive an LED here, 'AND' a couple of control signals there. However, these system-level odds and ends now happen on space- and cost-constrained, and most importantly, surface-mount boards.
A market thus emerged for 'tiny' surface-mount glue logic that served to deal with these marginal SSI cases. (ed note: TinyLogic is a trademark of On Semiconductor.) The remaining SSI players in the market pivoted to supply this need.
A DIP SSI function - be it a single or multi - would not only take more space, but would introduce a need to hand-solder or wave-solder the board. So the logic needs to be small as possible, it needs to be SMT, and as cheap as possible. This favors a single-function SMT IC.
Besides logic, level shifting is another case that shows up in small-footprint single- or 2-gate glue logic. This is another system-level problem that is often not dealt with by those big, highly-integrated devices that also want to use ever-lower I/O voltages.
Yet, in both cases there's rarely a need for more than one or two functions in a package. The emphasis is instead on tucking a bit of gate-level glue into an otherwise-packed SMD board to patch an issue that the big chips couldn't or didn't deal with. (This, too, is also where discretes still come into play.)
I should also mention another very useful at-the-margins 'tiny' solution: Silego (now Renesas) GreenPAK. This is a family of small FPGA-like devices that include logic, flip-flops and some mixed signal stuff, in very tiny packages. For example I used one to create a rest + PWM fan controller + thermal monitor for an SoC that didn't have these features, in a very tiny 20-pin LCC package.