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I'm trying to design better PCB layouts and as for now only work with 2 layers boards.

My question is about the signal return path on this PCB, is the design in the "right" path or I'm doing something wrong?

Any feedback will be appreciated.

Thank you in advance.

Obs.: In this particular design I can't change any pin on the microcontroller as is a legacy project and we will not create a new firmware.

Transparent 2D View: Transparent 2D View

Edit.: Top View: Top View: Bottom View: Bottom View:

Transparent 2D View (no GND polygon): Transparent 2D View (no GND polygon):

Top View (no GND polygon):Top View (no GND polygon) Bottom View (no GND polygon):Bottom View (no GND polygon)

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The ground does not look super great and could be continuous, a noncontinuous ground means that the return currents have to go all the way around the traces back to their source which could lead to Common mode voltage problems and EMI issues

Another thing is the VCC traces could be increased in size.

Think of traces is very small resistors you can actually calculate the value of the copper with a tool (like the Saturn PCB tool). You can then take the schematic (maybe a printout) and draw the little resistors in. Then ask yourself if that would be a problem to have that much resistance. But mainly it's the current that's an issue if you have high currents it will cause a voltage drop, 1amp through a 10 milliohm Trace is a 10mV difference in voltage, so go through your design and find some of the higher current areas or areas that might be sensitive to changes in voltage and make sure there won't be any issues with common mode voltages

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  • \$\begingroup\$ Yes, I agree that the if there was a continuous ground, like in a 4 layer board with signal-gnd-gnd-signal it would be a lot better. Routing on only top layer cannot be done without change the pinout of the uC or external connectors, but both cannot be changed. I use Saturn PCB tool, very useful. Those 20 mils traces can take 2A with 20 degrees of temperature rise, its more than enough to this board. Thank you for feedback. \$\endgroup\$
    – ianlydae
    Mar 22 at 14:54
  • \$\begingroup\$ When you say "return currents have to go all the way around the traces ..." this is what I intended to use as return path, as it is closer to the GND polygon on the side than the GND polygon on the other surface. I did this because the polygon on the other surface are routed too and will not be continuous. \$\endgroup\$
    – ianlydae
    Mar 22 at 14:57
  • \$\begingroup\$ If the designer is fine with it that that's great. In some cases the additional copper and inductance can be a problem. If the traces running across the board are just for on/off from the microprocessor, it might be good to interleave them between the top an bottom layers to allow for direct flow. If anything on the board can tolerate ~50mV of ground bounce than I wouldn't even do that. \$\endgroup\$
    – Voltage Spike ♦
    Mar 22 at 15:20
  • \$\begingroup\$ I don't know how to respond you about GND bounce because I've heard little about it. I think that, in my ingenuity, as the circuit is not critical, just some on/off digital stuff, maybe I'm good with some GND bounce. I'm trying to simulate for signal integrity / return path but couldn't setup it properly yet, I'm getting some fatal error on Altium simulator. I plan to study about Elmer FEM solver to see if it can help too. \$\endgroup\$
    – ianlydae
    Mar 22 at 15:38
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Looks like a nice Layout to me!

Here are the first things i noticed:

(1) I really like how you put "GND-Vias" next to each signal via!

(2) I really like how clean your routing is! (Bottom Top-Down, Top Left-Rigth - old school)

(3) I really like how nicely/logically your parts are placed. A good layout starts and ends with good component placement!

(4) In my subjective sense, i can "see" that you put a lot of "pride" in this design! I like it!

What i would change:

(1) The main filter cap GND-connection is only with four little bridges. You can increase the width of these - your ESR at higher frequencys will greatly improve! Also, if the PCB is subject to vibration the capacitor will have a more "ridgid" solder pad. I would remove the thermal-pullback, as this cap wont tombstone

(2) I would give all my SMD-Pads a nice corner rounding. This greatly helps paste-release during production. I would round the IC pads a 100% and all other SMD pads like 25-50%

(3) I would increase my pad and drill diameter on all - especially the gnd - vias. There is more than enough board space available and the reliability of your PCB will increase - also, the cost can go down! I would do a 1mm/0.5mm via.

(4) I would add Layer-Markers into the Copper - not strictly necessary on a two layer board, but why not. This greatly helps service technicians.

(5) I would add some fiducials on the board. They maybe on your panel, but you have the space and this can increase production yield.

(6) I would round over the edges of the PCB chamfers - nicer handling, less burrs.

(7) I would move the tracks ( on both layers ) on the (top view) left and right side inwards a few mm. This makes it possible to put "mouse-bites" in a well-defined place. You can specify this to your board-house. If you need a "clean" edge, you can move these mousebits inward a little. Your assembly cost can decrease.

(8) I would move the bottom layer tracks on the upper edge (top view) somewhat in. This gives you more distance to the edge and this can increase your PCB yield.

(9) I would pullback the copper fills around 1mm from the PCB edge. Same reason as (8)

(10) I would not do "thermal relief" on the single GND pin in the bottom-left. If wave-soldered, there will be no issue. If hand soldered: It will take 1s longer - not big deal. But, your inductance will drop and your realiability (especially when often plugged/unplugged, or if done by a "200 pound gorilla") will increase.

Keep up the good work!

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  • \$\begingroup\$ Thank you @ElectronicsStudent for taking your time to answer me and for the way you write it. \$\endgroup\$
    – ianlydae
    Mar 23 at 11:43
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I think that this video cover the problematic that I was wondering about and is relevant to be posted as an answer.

The title is "Coplanar Line with No Ground Plane | PCB Routing" by "Altium Academy / Zachariah Peterson". - https://www.youtube.com/watch?v=kRT72eM9bn4 -

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