Is there any chance to configure DDR3L SDRAM on Digilent Arty A7 FPGA development board to Dual Channel memory?

Question

There are 256MB DDR3L SDRAM installed on Digilent Arty A7 FPGA development board. Dual Channel memory is popular nowadays in a PC. So I was wondering if there is any chance to configure the DDR3L SDRAM on Arty A7 board to Dual Channel (or even Quad Channel) memory architecture? If it is possible, do you have a reference Verilog code for me to study? I'm new to this area.

Reference manual of Digilent Arty A7 FPGA development board is here.

Dual-channel memory is explained here.

Answer 1

No.

Multi-channel memory requires completely independent memory ICs and buses.

The Arty fails simply because there is only a single memory IC.

If there are multiple ICs, there are three possible different configurations:

• multiple channels: all signals are separate
• wide interface: the data signals are separate
• multiple ranks: only the chip select and clock enable signals are separate

All of these are hardware configurations, and cannot be altered after the board has been manufactured.

A typical PC will have up to four channels of nine 8-bit lanes and up to four ranks, and it is allowed to leave channels or ranks unpopulated, so installed RAM is detected at boot.

The Arty has one channel of two 16-bit lanes, single rank, and the RAM is soldered in, so the full configuration is known and fixed.