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I tried to build a 555 timer using the Multisim live online (free version).

I refer to the Ben Eater's video which I believe referred to the 555 timer datasheet.

Here is my circuit and the simulation result.

All the settings are default except the output threshold of the amplifier is set as 0-5V.

The simulation is as I expected but I don't understand why the absolute output voltage of the two NOR is so much different.

  1. Why is the lower output voltage of the NOR gate U3 not 0?
  2. The higher output voltage of NOR gate U4 is 1V which is below the high threshold (2V) of the logic gate input. How can that work?

You can open my circuit in this link.

enter image description here

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    \$\begingroup\$ Could it be because of the 100 ohm resistor between emitter and ground? Why it is there, instead of having a base resistor in series to prevent excess current? \$\endgroup\$
    – Justme
    Apr 23 at 6:05
  • \$\begingroup\$ @Justme thank you. I have done as you say but I didn't realize it is right because the output indicators' threshold setting are not consistent with the output of the NOR gates, which confused me. And I will modify my questions. \$\endgroup\$
    – zhixin
    Apr 23 at 6:37
  • \$\begingroup\$ For clarification, the original question has been solved: move the 100ohm resistor to the base or just remove it, which should be clear and I did originally do so but the wrongly setting indicator confused me. So the question now is changed to the why of the different absolute output voltages which confused me. \$\endgroup\$
    – zhixin
    Apr 23 at 6:55
  • \$\begingroup\$ The outputs of the NOR gates might not be strong enough to drive the transistor through the 100 ohm resistor. \$\endgroup\$
    – PStechPaul
    Apr 23 at 7:29
  • \$\begingroup\$ @PStechPaul Removing the 100 ohm resistor, the result is the same \$\endgroup\$
    – zhixin
    Apr 23 at 7:37

1 Answer 1

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In the first version of the question the transistor was unable to discharge the capacitor because it had an emitter resistor so it could only pull down to certain voltage before reaching equilibrium.

The components are not ideal.

If you have a heavy load (transistor) on the logic gate output, it will not be able to output logic levels, compared to a case of having a weak load such as input of another logic gate.

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  • \$\begingroup\$ What you said make sense. but why the lower voltage of the NOR without heavy load is not 0? the heavy load NOR out voltage is 1V which is below the high threshold of the logic gate input, how can that work? \$\endgroup\$
    – zhixin
    Apr 23 at 7:45
  • \$\begingroup\$ I don't know which logic family chips those are and what logic levels they use. It's a simulator, it can work in any way it wants. \$\endgroup\$
    – Justme
    Apr 23 at 7:49
  • \$\begingroup\$ logic level is 3.3V, input threshold is 0.8V~2V. You may open the circuit on web directly \$\endgroup\$
    – zhixin
    Apr 23 at 7:54

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