I have STM32F401 board (WeAct Black Pill V3.0, but the chip is labeled as STM32F401CCU6).

My task is to read output of AD7606 (16 bit, simultaneous sampling, 8 channels, 200 kSPS max) in parallel mode through 16 digital lines at maximal possible speed. One of the requirement is that each snapshot should be accompanied with its own timestamp (as uint32 number).

The ADC requires Conversion Start pulse to trigger each acquisition and conversion so my first idea was to program a PWM timer to do so and use an interrupt to store the system ticks counter. However, I realized that the code in the interrupt routine is actually executed more than microsecond later from the rising front of the PWM output pulse.

So I switched to another tactics and now I am generating the ADC triggering pulse in the timer interrupt routine right after I stored the system ticks counter. Now the time lag between the captured tick counter value and actual time moment when the ADC started conversion is minimal.

I’m rather new to the STM32 world so I was quite surprised that higher (compared to old good 8-bitters) speed and computational power actually do not mean higher degree of control over the chip.

Is there any other (perhaps more efficient) way to do achieve minimal time lag?

  • \$\begingroup\$ Just for reference, 1 μs is around 80 clock cycles, and provided HAL libraries are notorious for wasting clock cycles. \$\endgroup\$
    – Rokta
    Apr 26 at 12:39

1 Answer 1


Setup a 32-bit timer in input-capture mode, connect Conversion Start signal to the timer input. Generate Conversion start any way you like, then read your timestamp from timer's CCR register.

Don't do in software things, that should be done in hardware.


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