I'm designing a sniffer circuit to tap input signals from various machines. The type of signal varies from input pulses and UART communication, the voltage varies from 5V to 12V.

These are the requirements of the circuit:

  • Shares a common ground with the external machine.
  • Does not require tapping the VCC voltage of the external machine.
  • High impedance input. (Does not draw any current from the input)
  • Inverts input signal.
  • Steps down logic levels as high as 12V to 3.3V.

My first proposed solution is to use a 74HC4050 IC. However, this does not invert the signal and pulls the output pins low when the input is open. Additionally, the IC is quite expensive and does not come in a lower channel version.

My second solution is the circuit below:


simulate this circuit – Schematic created using CircuitLab

Will this work? Or are there any alternative solutions?

  • \$\begingroup\$ "Additionally, the IC is quite expensive and does not come in a lower channel version." What annual volume are you planning on? \$\endgroup\$
    – winny
    May 2, 2023 at 7:24
  • \$\begingroup\$ 500 but this could possibly scale up in the future. However, it is not a major concern as of now. \$\endgroup\$
    – Max
    May 2, 2023 at 7:31
  • \$\begingroup\$ 0.25080 USD a piece at 500 staffing at Digi-Key at the moment. Probably your best option as all quirks have been ironed out by TI/NXP already, faster and lower power consumption. \$\endgroup\$
    – winny
    May 2, 2023 at 7:35
  • \$\begingroup\$ When you say very high input impedance, practically, the input leakage will not be 0A. Is say 5uA ok? Also, what about the input capacitance allowed? What will be the frequency of the signal appearing on the input? Do we have to manage the case where input is open? Could you take a look at 74HC4049 instead which gives an inverted output? \$\endgroup\$
    – sai
    May 2, 2023 at 8:19
  • \$\begingroup\$ Consider adding a pulldown to the gate of the MOSFET, if the input isn't guaranteed to do that. \$\endgroup\$ May 2, 2023 at 16:46

1 Answer 1


Since you mentioned that 5uA input leakage is ok, a high value of resistor say 2.4MΩ or more can be used from M1 gate to ground. Without this, anyway R3 is limiting the current to 330uA. So, anyway it is ok but, if the output is mid-rail, it could create problems downstream.

You'll be loading the input line with a cap of max 50pF. Given that you are going to use it for low frequency, it should be fine but do check if the circuit you plan to sniff has any restriction on the cap load.

Output rise time will be of the order of 1.5us (assuming 25pF load and 25pF MOSFET output cap). So, period of the input waveform should be atleast 10 times more. If this rise time is not acceptable, you can use a PMOS instead of the resistor (CMOS inverter) but then, you need to check the shoot-through current during the switching (not an issue if input has very sharp edges) and must use a pulldown resistor to define the gate when input is open. If input has very slow edges, there is a risk of chattering at the output in this configuration. To manage this, you need to use a Schmitt trigger instead of this.


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