# Mapping AC input signal to small output signal with offset

I want to develop an amplifier circuit which allows me to map an input voltage from -8 to +12 V to a suitable range for an ADC (0-3 V).

While searching the internet I found only a few suitable circuits. Therefore I assume that I use the wrong search terms. I assume that this application occurs frequently, e.g. the voltage measurement of general AC sources or motor voltages etc.

Since the gain is less than 1, I have found two possible solutions so far:

1. Voltage divider + non-inverting amplifier with DC offset

2. Inverting amplifier with positive DC offset

However, I can't judge which is better or suitable at all in my situation. Therefore I am looking for sources (application notes) for such amplifier circuits.

How can I map an AC signal to a small output signal with an DC offset?

Here are some more details.

The signal we want to measure is a bus signal which corresponds approximately to the RS-485 standard, with some exceptions. We want to sample this signal with about 2 Msps which corresponds to 8 samples at a data rate of 250 kbps. The goal is to make a statement about the quality of the signal.

The amplitude resolution does not have to be very precise, but qualitative statements should be made. The goal is 6-8 significant bits.

The two signals of the bus should not be sampled differentially but measured separately against GND to be able to make a statement about the offset to GND.

For the supply of the amplifier circuit only a supply voltage of 3.3 V is available and no further supply voltage is planned.

• Knowing more about the source of your -8 to +12V signal helps to figure out what constraints we have on loading of that source. If you can tell us more about the source, it will help. It will also help if you can give us some idea of what power supply potentials you have available, such as -5V and +5V, or just +3.3V. Commented May 3, 2023 at 14:42
• This is a question and answer site so, basically, you need to ask a question. Asking for recommendations for application notes is off-topic (as is asking for component recommendations). Commented May 3, 2023 at 15:12
• @Matthias what voltage rails do you have available? Commented May 3, 2023 at 15:36
• Do you have any requirements with respect to noise? Commented May 3, 2023 at 17:35
• @Andyaka How should I ask if I want to get the right source form information rather than a solution? Commented May 3, 2023 at 20:22

The way you do this is scale and offset.

In your case you have an input of -8 V to 12 V, so that's a range of 20 V. Your output is 0 V to 3 V, so a range of 3 V. To scale you divide the output range by the input range: $$\frac{3 V}{20 V} = 0.15$$

You need a voltage divider that will give you 0.15 * $$\V_{in}\$$, 15 parts out of 100. Make the divider's bottom resistor some multiple of 0.15, say 1500$$\\Omega\$$ which is 10,000 times, then make the total resistance 10,000 times 1, making the top resistor 8500$$\\Omega\$$.

Then you need an offset. Take the low end of your input range and scale it: $$-8 V\times 0.15 = -1.2 V$$

So your offset to bring that up to zero will be 1.2 V. This can be derived from your supply voltage with a divider.

Then you just need a summing circuit which can be done with an opamp. Assuming you have 3.3 V available for your supply this uses a resistive divider to get 1.2 parts out or 3.3 for the offset. The offset and scaled input are then summed with the opamp. The non-inverting gain is set to 2 because the voltage to the non-inverting input will be attenuated by 2 due to the input resistors acting like a divider. The opamp needs to be a single supply type unless you have a negative supply voltage available.

• What are the advantages of the proposed circuit, compared to, for example, Texas Instruments SLOA097 Section 3. As far as I understand, the circuits are the same in effect, but use a different approach to the design of the voltage divider. Commented May 3, 2023 at 17:35
• @Matthias Advantages? I can remember how to do the math on this one in my head :D Commented May 3, 2023 at 19:07

The following solution uses only resistors, and the existing 3.3V supply.

Mapping -8V...+12V to 0...+3.3V requires a gain $$\A\$$ of

$$A = \frac{(+3)-(0)}{(+12)-(-8)} = 0.15$$

This attenuation is easily obtained using a resistor potential divider with resistance ratio $$\(1-0.15):0.15 = 17:3\$$. The final design will behave as this does:

simulate this circuit – Schematic created using CircuitLab

If you have a reasonably precise and stable +3.3V supply, you won't need any voltage reference, and we can derive some arbitrary voltage $$\V_{BIAS}\$$ anywhere between 0 and +3.3V with another potential divider.

We need to find $$\V_{BIAS}\$$, the potential that will create exactly the right offset in the output to produce $$\V_{OUT}=0V\$$ when $$\V_{IN}=-8V\$$. The relationship between $$\V_{OUT}\$$ and $$\V_{IN}\$$ is:

$$V_{OUT} = V_{BIAS} + (V_{IN} - V_{BIAS})\frac{R_2}{R_1+R_2}$$

Rearrange to find $$\V_{BIAS}\$$, and plug in all the apposite values:

\begin{aligned} V_{BIAS} &= V_{OUT}\left(1 + \frac{R_2}{R_1}\right) - V_{IN}\frac{R_2}{R_1} \\ \\ &= 0 - (-8)\frac{3}{17} \\ \\ &= 1.41V \end{aligned}

Now our goal is to find a potential divider between +3.3V and 0V which will produce 1.41V, and for which the combination of V2 and R2 above is its Thevenin equivalent:

simulate this circuit

This requires that R3 and R4 have values that would combine in parallel to the same value as R2, 3kΩ:

$$\frac{R_3R_4}{R_3+R_4} = 3k\Omega$$

The other requirement is that the unloaded potential at OUT be 1.41V:

$$3.3\frac{R_4}{R_3+R_4} = 1.41$$

Solving these simultaneous equations gives us:

\begin{aligned} R_3 &= 7020\Omega \\ \\ R_4 &= 5240\Omega \\ \\ \end{aligned}

Replace V2 and R2 with this potential divider:

simulate this circuit

Now you have OUT going from 0V to +3.0V as IN goes from -8V to +12V:

These resistor values are not easy to create, but you can play with them to find values which are actually available (in the E12 and E24 series). As long as the ratio R1:R3:R4 = 17000:7020:5240, the IN-to-OUT relationship stays the same.

Don't hesitate to increase attenuation a little, by increasing R1, or "lifting" output potential a little by increasing R4. Any small offset you introduce in doing so, or gain change this causes, can be compensated for in software.

The input impedance (the "loading" as seen by the source of signal you are measuring) is 20kΩ, using the values we calculated above. If you require higher than this, to minimise signal loading, you can increase input impedance by a factor of ten by multiplying all resistances by ten.

If that's still too low, you should buffer the input signal prior to applying this offset/scale network, which would best be done by an op-amp voltage follower. However, be aware that the op-amp will require power supplies that exceed the extremes of any expected input potential. That means op-amp supplies of +14V and -10V, for example.