1
\$\begingroup\$

I'm currently working on a dual supply solution (POE + DC (called Main_Alim)) for a project.

Grounding with SSR

I want to disable PoE negaciation when DC is present. For this, I need to connect the node between R7 and R90 to GND_POE when DC power is present. The issue is that DC power (MAIN_ALIM on schematics) is referenced to a different ground (GND_ALIM).

So I believe I need some sort of isolation in between. So far, the best ideas I found are either an optocoupler with transistor output, or a solid state relay (SSR).

Both should work fine, excepted that the control current involved (several mA) is a bit high to my taste (MAIN_ALIM can be anything between 18 and 75V, do I get losses in the range of 100-200mW for just some "logic"). Opto-couplers are also quite bulky due to the high isolation.

Am I missing some interesting solution?

The constraints I have :

  • MAIN_ALIM is between 18 and 75V (with respect to GND_ALIM)
  • voltages on any lead of R7 and R90 are between 0 and 75V (with respect to GND_POE)
  • difference between grounds is <75V (I aim for never exceed values of at least 100V to have some margins)
  • the difference between any 2 potentials involved is <75V (I aim for never exceed values of at least 100V to have some margin)
  • the current I need to "switch" is <6mA. Switching will be very rare (<1/hour in average) and switching delay is absolutely not critical (delays of a few seconds are OK)
  • I have no nice "logic" voltage rails available (the only thing I have on both sides is about 4.7V from a zener+resistor, so its OK to use, but only for very small currents (<1mA))
  • my main concern is power (I would like to stay bellow the 50mW when MAIN_ALIM is 24V). Second comes PCB space. Cost is not of great importance (<10$ is nice, <20$ is OK)

Any ideas except looking for a SSR or transistor based opto-coupler with the lowest possible input current?

\$\endgroup\$
3
  • 2
    \$\begingroup\$ Do you have an auxiliary tap on your fly-back transformer? Analog Devices has a POE solution that does just that - switch automatically from DC to POE \$\endgroup\$
    – Lior Bilia
    May 4, 2023 at 10:18
  • \$\begingroup\$ No, I don't have an extra tap (we decided to go for isolated DC/DC modules instead of designing them from scratch). \$\endgroup\$
    – Sandro
    May 4, 2023 at 11:06
  • \$\begingroup\$ @LiorBilia : thanks for the clue about looking into other POE solutions : it turns out that the one we choose at the begining (before we decided to add an external supply) was making things very complicated (including but not limited to the problem in this question) : choosing a solution designed for power ORing between PoE and DC made things far easier and reduced the BOM \$\endgroup\$
    – Sandro
    May 4, 2023 at 15:20

1 Answer 1

1
\$\begingroup\$

Depending on what the rise/fall times are, a solution like this may work or at least be a starting point. After all, you only need to transmit a change in state.

schematic

simulate this circuit – Schematic created using CircuitLab

The circuit on the right side uses essentially no power, since there's no static current flowing through R1 and R2, and the Schmitt triggers and the RS latch are CMOS logic. You can use 40xx logic for those, since it'll work fine from 5V to 15V, so the accuracy of the Zener won't matter much, and there's no need for any sort of precision regulation. A 9V Zener would be just fine.

The optocouplers can be basically the cheapest/most popular you can find. The cost for the whole circuit, even in low quantities, is a couple USD.

There may be a need for a series resistor between DC_ALIM and C1, but you'd need to check that. If DC_ALIM has a decent decoupling capacitor, the slew rates will be limited, and the current flowing through C1 will not destroy the LEDs.

VMON is optional to ensure a reset to a desired state, and can be any micropower voltage monitor that will survive VCC and have an open-drain/open-collector output.


Another solution can use a relaxation oscillator and a monostable to save dropper resistor power:

schematic

simulate this circuit

When power is present, C1 charges through R1. Once it reaches about 6V, Q1's B-E junction breaks down, charge is injected into the base, and Q1 starts conducting in the reverse (alpha) mode, with negative resistance. This periodically blinks the SET optocoupler.

At the same time, C3 charges up as well. Q3-Q4 form an SCR. Q2 keeps the SCR gate off as long as power is present.

Once power goes out, C2 charges from C3, fires the SCR, and the SCR discharges C3 via the RESET optocoupler LED.

D2 is optional and may be removed if the circuit behaves properly without it.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.