# Learning the Art of Electronics 9N.4 -- low-dropout voltage regulator

I have trouble understanding one circuit in section 9N.4 of the book "Learning the art of electronics" by Thomas C. Hayes. I attached a screenshot of that section below.

I understand the section is describing the problem with unexpected positive feedback when we have an inverter in the negative feedback loop, but I don't quite know how one can analyze the first circuit in Figure 9N.7.

I copy the circuit here where I label some voltages and currents. I understand that the diode on the left is a Zener diode with definite reverse breakdown voltage $$\V_{ref}\$$, so it will keep $$V_-=V_{ref}.$$ Then $$V_B=V_E-0.6V=V_{in}-0.6V$$ because of the EB voltage drop for the pnp transistor. Also, suppose the op-amp has open loop gain A at DC (suppose $$\V_{in}\$$ is DC for now), then $$V_B=A(V_+-V_-)=A(V_C-V_{ref})$$ In order to solve these equation we need to know the relation between $$\V_B\$$ and $$\V_C\$$. For that, we need to know $$\I_C\$$ since $$\V_C=I_C R_C\$$. And as we can assume $$\\beta=100\$$ for the transistor, we need to know $$\I_E\$$ or $$\I_B\$$. Also, I have 2 questions:

1. why they don't put a resistor between $$\V_{in}\$$ and $$\V_E\$$?
2. without this resistor, how can it be a pnp common-emitter amplifier and hence inverts the signal from $$\\Delta V_B\$$ to $$\\Delta V_C\$$?

Hope someone can give me an idea how to move forward. Thanks!

1. Don't let the BJT fool you. A voltage regulator is, at the core, a voltage buffer with a fixed voltage (reference) at its input and Vin (as in your drawing) as your supply. The BJT is added because it has a greater current capability than a Op-amp.

You can, in principle, add a degeneration resistor at the emitter; you would be, then, adding local feedback to your output stage. It might linearize it a bit, but will also increase your dropout voltage. I don't think it's a good idea, unless your BJT has a thermal runaway problem.

1. To intuitively see that this circuit has negative feedback, you can try finding a conflict in the sign of the signal around the loop.

First, if this were a properly designed negative feedback amplifier, the inputs at both (+) and (-) of the op-amp must have the same sign.

Therefore, if you imagine that the (-) input has a upward swing, then the (+) must have the same upward swing to suppress it (you already know the op-amp will amplify the difference). Since the voltage at the (-) is higher, this will make the output of the Op-amp swing in the opposite way (think as if it were an small-signal comparator). Then, this downward swing of the Op-amp is amplified and inverted again by the PNP towards it's collector, bringing it back to the original positive sign.

Placing a resistor at the emitter has some not-very-obvious but very serious consequences for the phase of the feedback:

simulate this circuit – Schematic created using CircuitLab

I'm not constraining at all the voltage that can be applied at the base (X), in the same way the op-amp could apply any potential it likes there, but you can probably see already that this could forward bias the base-collector junction. This happens for all potentials at X less than +10V or so, as can be seen if we sweep the potential at X from 0 to +12V:

With the base-collector junction forward biased, in the region to the left of the green marker, node FB (where we take feedback from) actually tends to follow X. To the right of the marker, though, the transistor operates in its active region, amplifying more or less linearly but with negative gain.

Therefore, for $$\V_X<+10V\$$ we have a gain of about +1, but for $$\V_X>+10V\$$ we have a gain of −10! If we used FB for feedback in a closed loop, feedback could be positive or negative, depending on the op-amp's current output state. It certainly wouldn't be a stable system.

This is a great example of the "hidden" inverter in the "blob" mentioned in the book, except this blob sometimes inverts and sometimes doesn't.

By omitting an emitter resistor, connecting the emitter directly to the positive supply, base potential at X is constrained to +11.3V or greater (by the 0.7V drop across the base-emitter junction), and the base-collector junction is no longer able to be forward biased like before.

I believe that a base resistor should be used also, in the absence of a resistance at the emitter, since as it is in the author's circuit, the op-amp's output is clamped, effectively short-circuited, to the positive supply.

Base resistor aside, your second question, about the inverting nature of this common-emitter PNP arrangement confuses me a little, since that's exactly what common emitter BJT configurations do - invert.

If I raise base potential, I lower $$\V_{BE}\$$, lowering base current and consequently also collector current. Lower collector current means smaller voltage across the collector resistor, which necessarily takes the collector potential towards zero. In fewer words, an increase in base potential results in a decrease of collector potential, which is an inversion.

In the following common emitter setup, I sweep base potential $$\V_X\$$ from +11.2V to +11.5V, and plot the corresponding output $$\V_{FB}\$$:

simulate this circuit

The inversion is evident in the negative gradient of the relationship between $$\V_{FB}\$$ vs. $$\V_X\$$.

### Update:

Just to preempt a some questions you might have, here are some additional things you might find useful.

I think you may be under the misapprehension that an NPN common-emitter arrangement inverts, but that a PNP setup does not. This is not true. All common-emitter (and common source for enhancement mode FETs) invert. Between NPN and PNP, all polarities are swapped, not just those on one side (say, the input side). $$\+\Delta V_{B}\$$ causes $$\-\Delta V_C\$$ and vice versa, in both cases.

In my first circuit above, with emitter resistor R1 present, the literature doesn't usually explore what happens when the base-collector junction is forward biased. Typically this arrangement is used to amplify small variations in base potential, as would be the case in audio applications, for example.

It is usually assumed that fluctuations at the base are small enough that the transistor is never saturated, and never cut-off. The books spend a lot of time explaining the behaviour of the amplifier in its active, linear, region only, but rarely describe the consequences of leaving that regime. The exercises usually explain how to bias the transistor to place the collector potential at some convenient mid-point between the power supply potentials, but don't address what happens when this "quiescent" state is severely disturbed.

In this particular application, though, the op-amp is quite able, and very likely in fact, to take the base way outside the transistor's active region, and you must therefore consider not only active-region behaviour, but also behaviour in cut-off and saturation. As I showed you in the first graph, behaviour during saturation can be very weird!

• Thank you, your reply helped me understand it more. I could have been clearer regarding my assumptions or what I take to be true. I remember now that there essentially are two pictures of (BJT) transistors: current amplification and transconductance amplification. I usually use the current amplification more plus the assumption that VE = VB + 0.6V. So when I was reasoning from a given VB, I was confused because VE is fixed by the supply. I also know how to see that the pnp with the emitter resistor will be saturated if VB < ~10.3 or 11 V, so it won't work as the authors intended. Commented May 12, 2023 at 18:45
• it will have gain +1 and -10 in 2 ranges of VB and will not be stable as sometimes it needs positive feedback, sometimes negative feedback. By removing the emitter resistor, we clamp VB a diode drop lower than the supply, and we are in the active regime always as VC has more room to swing as well (up to V supply). It is always inverting in the operating regime. Commented May 12, 2023 at 18:50
• Even if I let VB drop lower than 10V (suppose we consider it alone without the op-amp), which is more than 1 diode drop compared to V supply, the Eber Moll picture will tell me the collector current. Even if this current is large at this VB value, the pnp wont be saturated. Let me know if these reasonings are sound or not. Commented May 12, 2023 at 18:54

If you want to analyze small variations about the operating point, I suggest you invoke the hybrid-$$\\pi\$$ BJT model. That will give you Ic as a function of Vb from the bias point and $$\\beta\$$.

For the operating point, you can simply equate the two op-amp inputs so Ic = Vref/Rc, to a high degree of accuracy, since A is very large (and the transistor gain is on top of that).

1. Putting a resistor in the emitter would have a couple of effects- for example, it would limit the output current, and it would lower the overall open-loop voltage gain. Do we want to do those things? Maybe, maybe not. Perhaps this is best left for later consideration.

2. To see that it's inverting, consider the output of the op-amp going negative from where it is in steady state. That increases the base current flowing out of the PNP transistor, which increases the collector current flowing out of the PNP. The collector voltage thus rises since Vout = Ic * Rc.

It might be easier to see in this loop:

simulate this circuit – Schematic created using CircuitLab

$$\I\$$ is on the right. This is the current through the load. The $$\R\$$ block is the load itself and it multiplies its load current to develop a voltage across it. The difference between that voltage drop and $$\V_{_\text{REF}}\$$ is then fed to the opamp, which multiplies that difference by $$\A\$$. This multiplied difference is then subtracted from $$\V_{_\text{IN}}\$$ in order to get the $$\V_{_\text{BE}}\$$ for the PNP BJT. (I'm keeping that difference as a positive value, since $$\g_m\$$ is also positive, and we are considering the resulting $$\I\$$ as positive for the load.) This difference is applied to the BJT's $$\g_m\$$ to get the collector current, $$\I\$$.

So, the equation to solve is:

$$I=\left(V_{_\text{IN}}-\left(I\cdot R-V_{_\text{REF}}\right)\cdot A\right)\cdot g_m$$

($$\g_m\$$ is just the BJT's local slope converting an applied base-emitter voltage to its collector current.)

Find:

$$I=\left[\vphantom{\frac{g_m}{\frac1{A}+g_m\,R}}V_{_\text{REF}}+\frac{V_{_\text{IN}}}{A}\right]\cdot\left[\frac{g_m}{\frac1{A}+g_m\,R}\right]$$

In the limit, as $$\A\to\infty\$$ this becomes:

$$I=\frac{V_{_\text{REF}}}{R}$$

Or $$\I\cdot R=V_{_\text{REF}}\$$, which is as expected.

• I see, so in this case we use something called the transconductance or Ebers-Moll picture of BJT right? So $V_{EB}$ is not necessarily 1 diode drop, and $I_C$ is an increasing function of $V_{EB}$. At the operating point we just consider the local slope $g_m$. i.e. $I_C=g_m V_{EB}$. Is that right? Commented May 12, 2023 at 17:54
• or even a Taylor expansion like $I_C=g_m V_{EB} + const$ Commented May 12, 2023 at 18:06
• @summeriok I take the difference between inputs at the opamp and multiply that result by A. This feeds the base of the PNP. To work out what the PNP base-emitter value is, as a positive not negative value, subtract that from the supply rail. That difference is what drives the PNP collector current (Shockley equation.) Since this model requires linear multiplication, the slope of the Shockley model must be extracted. This just happens to be $g_m$. No Taylor's required; it is the slope of the exponential I/V curve at the operating point. (Cancels out in the end as A --> infinity.) Commented May 12, 2023 at 20:53
• thanks for the clarification. "Taking the slope" is actually Taylor expanding to the first order, btw. Commented May 15, 2023 at 2:18
• @summeriok Of course. Kind of by definition. Commented May 15, 2023 at 3:34