SN74HC595 shift registers, cascade connection, SRCLK and RCLK pins shirted

Question

I'm working on project, where we have sn74hc595 shift registers included. Because I got this project without any documentation, it was necessary to understand this connection of shift registers, so I can write code. I am familiar with shift registers, which has separated SRCLK and RCLK in cascade connection. But this kind of connection is the one, I don't understand. I found some similar problem here: 74HC595 Shift Register Latch Pin, but here is only one shift register.. In datasheet is also mentioned, that SRCLR and RCLK can be connected together: "Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register. This is ok. Is this also allowed in this kind of connection?

Can someone know why is this connected like this(SRCLK and RCLK together)? And what is benefit from this kind of connection? 3rd shift registers OE is always enabled, for first two we have control.

Thanks in advance. If there is any info missing, I will add it.

Answer 1

Connecting SRCLK and RCLK together, and cascading multiple shift registers, are completely independent things. You can do none, or either, or both.

In this case, SRCLK and RCLK are connected together because the controller does not have a free pin for an additional signal.

A separate RCLK would allow shifting all the bits in without the shifting process being visible at the outputs. For LEDs, this does not matter, but when the outputs control other hardware, a separate RCLK would be required to avoid wrong pulses.