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I was looking at library components created for Altium designer from some 3rd part when I found that for FPGAs, there is a vertical bar always present. The colour of this bar always changes for the different I/O banks. This bar does not exist in those parts of the schematic symbol that are for power, GND or JTAG. They only exist for the I/O banks. Here is an example:

enter image description here

There are two questions.

  1. What is the purpose of these different color bars.
  2. Why are the name pin designators not in proper alphabetic order? em.g C2, B1, C1 e.t.c.
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1 Answer 1

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For starters, we need to see the pin outs for the FPGA, from the data sheet. This looks like a BGA or column grid array component.

Here's a typical example of what may be going on. The picture below is for a 624 "pin" BGA package. Note that the balls are numbered in an X-Y format, 1-24 and A-AE. So something like C13 would represent a specific ball.

enter image description here

The two sets of balls highlighted in light blue are two different IO banks, 1 & 7 in this case. The signals that use these IO banks are a PCI bus. In this application, the signals were split between two banks to limit the number of fast-switched IO in a given bank.

Finally, note that all the IO for a given bank is clustered in specific part of the package. But because this is a 2-dimensional organization, the ball numbers are not always sequential.

So then back to your Altrium schematic snippet, I think what you have is just a technique that Altium uses to show visually how signals that may connect to those IO banks are grouped. it's just a visual aid.

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  • \$\begingroup\$ Do you mean that the FPGA tool itself shows the different banks in different colour? \$\endgroup\$
    – quantum231
    May 23, 2023 at 2:28
  • \$\begingroup\$ I don't think so. That graphic is something the designer put together to help show the physical location of signals on the package. \$\endgroup\$
    – SteveSh
    May 23, 2023 at 11:39
  • \$\begingroup\$ What benefit is lost in the schematic if the colored bar is removed from the graphic symbol? \$\endgroup\$
    – quantum231
    May 23, 2023 at 19:29
  • \$\begingroup\$ Just some eye candy? \$\endgroup\$
    – SteveSh
    May 23, 2023 at 21:28
  • \$\begingroup\$ ok so what I understand is that, the pin planar in the design tool like Quartus or Vivado, shows the different banks in different colors. Since these are BGA packages, the bank is not all pins on one side, but a chunk of the pins that are adjacent. The creator of the symbol is taking the same color shown in the pin planar and using them in the schematic symbol. Is that correct? Different parts that belong to the same bank would be expected to use the same colored bar. However, that is all there is. It has absolutely no functional purpose in the schematic since removing it does not harm. Yes? \$\endgroup\$
    – quantum231
    May 23, 2023 at 23:25

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