I was looking at library components created for Altium designer from some 3rd part when I found that for FPGAs, there is a vertical bar always present. The colour of this bar always changes for the different I/O banks. This bar does not exist in those parts of the schematic symbol that are for power, GND or JTAG. They only exist for the I/O banks. Here is an example:
There are two questions.
- What is the purpose of these different color bars.
- Why are the name pin designators not in proper alphabetic order? em.g C2, B1, C1 e.t.c.