In this PDF, I read this line:
This means that the bus can be thought of as acting like an AND gate: If any node writes a dominant (0) bit on the bus, every node will read a dominant bit regardless of the value written by that node.
What does this mean? Like, the node has already written 0 on the bus, so how does the phrase "regardless of the value written by that node" make sense here?
Also, I get the comparison to AND gate in the sense that if a node writes 0 and another node writes 1, the bus reads 0 via the process of CAN arbitration, but could someone explain this comparison more clearly?