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I have a BGA part (specifically, IS61WV51216EDBLL-10BLI from ISSI) that uses 0.24mm pads. Is it possible to resize these pads to 0.3mm without making it impossible to manufacture? The reason I want to do this is that my PCB fab doesn't support smaller than 0.3mm BGA pads. I also can't do VIP, as it is too expensive. The smallest distance between a BGA pad and a trace is ~0.127mm.

Here's a screenshot of my fanout. Grid size is 1.27mm. Some pads are removed as they are NC pins. If they were there, the fanout wouldn't fit within my PCB fab's tolerances.

screenshot

I don't absolutely have to do this, as I can simply use a different part that has similar enough pinout and specs but larger BGA pads. But I would prefer to use this component as it's the smallest part I was able to find that's within my timing requirements. (90-125 MHz)

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  • \$\begingroup\$ Removing pads for unused balls is not advisable, particularly placing vias (which may not be well covered) underneath. \$\endgroup\$ May 24, 2023 at 20:16
  • \$\begingroup\$ @TomCarpenter Then how do I route this? Is it even possible to route this within my requirements? \$\endgroup\$
    – NickKnack
    May 24, 2023 at 20:26

1 Answer 1

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According to the datasheet, the nominal ball diameter of that part is 0.35mm. From this answer, the nominal pad size for such a ball diameter should be 0.3mm, with an acceptable variation of 0.25-0.35mm. This seems to suit your requirements.

In terms of routing, removing pads for unused pins is not advisable, as this can cause problems during assembly and mechanical issues later on. Essentially the ball whose pad is missing has nowhere to reflow and may cause the package to sit at an angle leading to other balls being left unconnected. This may not be an issue for a one-off, but should not be considered for production runs.

If there is not enough space to route the pins out on the same layer, via in pad is pretty much the only option for narrow pitch ICs without space for diagonal vias.

At 0.75mm pitch there may be just enough room to place a via diagonally from the pad such that the hole itself is not within the exposed region of the solder mask. As long as most of the hole is outside the exposed pad region you should be ok.


With a little bit of rearranging of traces, you may be able to do it without vias. Would something like this work:

Rearranged traces to pull out extra pad without via

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  • \$\begingroup\$ Is it an option to use the NC pads as a kind of "bridge" for the other signals? An example would be trying to route F3. Could I use G2 as a "bridge" for F3? The NC pads are labeled as "No Connection" which probably means that there's no internal connection and they can be used as such, but I am not entirely sure on that. The option you specified isn't possible as the minimum via size is too large (for non-Via In Pad boards) to fit between the pads without the possibility of the solder mask variability shorting the via to an adjacent pad upon assembly. \$\endgroup\$
    – NickKnack
    May 24, 2023 at 20:46
  • \$\begingroup\$ @NickKnack It might be possible without vias, I've added a rough sketch. You'd have to rearrange any signals as required once outside the outline of the chip. \$\endgroup\$ May 24, 2023 at 21:00
  • \$\begingroup\$ Yes, it is possible. I managed to route it. (Although, it is very close to minimum trace spacings in a lot of areas.) Thanks for your help. \$\endgroup\$
    – NickKnack
    May 24, 2023 at 21:08
  • \$\begingroup\$ Worth noting that one of the common cheap Chinese PCB fabs does FREE filled and plated vias in IIRC 4-8 layer stacks, so via in pad is way more affordable for small run then it once was. It is an option that is worth examining because it cuts out a lot of pain and lets you get to power and ground right under the appropriate balls. \$\endgroup\$
    – Dan Mills
    May 25, 2023 at 9:24

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