I'm having trouble intuitively understanding how a MOSFET cascode current mirror functions.

Cascode current mirror

I understand that the purpose of M3 is to shield M2 such that variations in applied voltage do not affect Vds of M2 and keep $$ Vx = Vy $$ where Vy is the drain-source voltage of M2.

Most descriptions of this circuit now describe choosing the gate voltage of M3 such that $$ Vb = V_{GS3} + Vx $$

The next step of the circuit design is to add an additional transistor as shown below:

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This is the point where I get lost. I just don't see why this configuration forces the Vds of M2 to follow the Vds of M1.

So, my question here is really a request for an intuitive description of what's going on here. I've spent quite some time already trying to figure this out myself with simulation and reading on google, but I just don't understand this well.

Any help appreciated.


2 Answers 2


If all the FETs are equal sizes, they will have equal VGS.

in your 2nd circuit, V(x) is VGS of M1 with current IREF. Since M0 runs the same current, it will have the same VGS, so V(N) = 2*V(x).

Since M1 & M2 have the same VGS, they will have the same current. Equally M3 (also running the same current as M2), will have the same VGS as M2 and also as M1.

Now, since you know the VGS, you can see that V(y)==V(x); thus M2 has (nearly exactly) the same VDS as M1, so its current is more precisely equal to that in M1.

  • \$\begingroup\$ Thanks very much for taking the time to answer. \$\endgroup\$ Commented Jun 3, 2023 at 19:48
  • \$\begingroup\$ I'm still having problems with this though. If we just consider m2 and m3 and were to create a small signal model of them, they'd have equal gm and ro (output resistance) values. If the vdd applied at point p is increased, then I think that the small signal model would predict that the voltage at point Y would increase by half of the applied vdd change (since ro of both transistors is the same). But I understand that this configuration is meant to suppress changes at Y. What am I misunderstanding here? \$\endgroup\$ Commented Jun 3, 2023 at 19:55

Assume M0 & M3 are similar transistors of the same size
Assume Iref = Iout
hence VGS0 = VGS3 (assuming both M0 & M3 are in saturation)

M0 & M3 have the same gate voltage. So, we can conclude that they will have the same source voltage so, VX = VY.


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