I am trying to output a 2 bit-number that indicates which input signal changed during the time span when "detection mode" is switched on by another input signal. The output is saved in a register.
Each time detection mode is switched off and on again, the output/register should be set to 0.
So the register depends on changes in multiple signals. The way I know of to react to signal changes is using always blocks. However, inside one always @* block reacting to any change, as I understood, it is not possible to differentiate between changes in different signals and react to each of them in a separate block, as always cannot be nested, and @negedge / @posedge is not synthesizable.
I do not use a clock, purely combinatorial logic, to limit complexity in the overall FPGA-Microcontroller system. Unless there is no other solution, this should not change.
Edit on May 28, 2023 The signals are independent from each other and use a one-wire data transmission protocol without a second clock line. The minimum period between signal changes is around 100ns. I prefer not to have to include a clock detection circuit. Only one input is connected at a time. The aim of the circuit is to detect which input is connected. Edit end
I have difficulties realizing this behaviour using only one
always block (
always @*). Using several
always blocks, I run into the problem that one register cannot be set by several
I could not find any hints on how implement this logic on stackexchange or elsewhere. I believe that maybe combinatorial logic with more registers could somehow lead to the desired result, but I am not sure how.
Neither do I understand how I can integrate the
always @Local_Mother1 and 2 blocks into the first
always block and set the Signal Number inside that block correctly.
My code looks as follows, but results in an error (Only one
always block can assign a given variable)
input wire Local_Mother1, Local_Mother2; //The signals to be detected (only one signal may be connected) input wire Steuerung; //Used for controlling detection mode reg r_LMCode[0:1]=0 ; //Initialized at 0, this synthesizes using Lattice ICE40 - Signal number reg r_LMdetectmode=0; //Initialized at 0, this synthesizes using Lattice ICE40 - Detection mode //Handle the detection mode switch-on and off always @(Steuerung) begin if (r_LMdetectmode==0) begin //detection mode off if (Steuerung==1) //This switches on detection mode r_LMdetectmode <= 1; //r_LMCode <=0; //could be set here as well, but does not change the problem end else begin //Detection mode is on if (Steuerung==0) begin r_LMdetectmode <=0; //Switch off detection mode r_LMCode <= 0; //Signal Number set to 0 - gives an error! end end end always @(Local_Mother1) begin //in case Signal 1 has changed if (r_LMdetectmode==1) r_LMCode <= 1; //Set signal number to 1 if detect mode is on - error! end always @(Local_Mother2) begin //in case Signal 2 has changed if (r_LMdetectmode==1) r_LMCode <= 2; //Set signal number to 2 if detect mode is on - error! end