The paper " The design of analog signal communication system based on visible light ", Z.N. Zhang and H.Y.Y Hua., describes a communication system using VLC technology.

There is this part in the implementation part, where they write:

Modulation and optical signal output module:
The output voltage of the J3 of the sound sensor module is converted into digital voltage by AD conversion module of single-chip microcomputer and read into the single-chip microcomputer for frequency modulation. According to the result of frequency modulation, PWM wave of the corresponding frequency is output by MSP430 to control the flashing frequency of LEDs.
A digital-to-analog conversion is initiated by an ascending edge of a sampled input signal called SHI. After synchronization with ADC10CLK, the sampling timer sets SAMPCON to the height for the selected sampling period. The total sampling time is t synchronization. SAMPCON starts analog-to-digital conversion when it changes from high to low, which requires 13 ADC10CLK cycles. The sampling sequence is shown in the figure.

They do not ever mention what SAMPCON, SHI, AD10CLK are. There is basically no resource on the internet that explains these well. Would someone please explain to me what they are and what they do?


1 Answer 1


SAMPCON, SHI, and ADC10CLK are signals that are internal to an ADC10_A module in a MSP430 family microcontroller.

enter image description here

Image from TI's MSP430x5xx and MSP430x6xx Family User's Guide SLAU208Q

SAMPCON controls the sample and hold circuitry and whether or not the 10-bit ADC core is in convert mode.

ADC10CLK may have a variety of uses. It appears in the diagram to the right and slightly below center of the ADC10 ADC core symbol.

The SHI signal found on the diagram below the ADC10CLK signal. It is one of the inputs to a multiplexer whose output is SAMPCON.

  • \$\begingroup\$ what is 'hold'? \$\endgroup\$ May 27, 2023 at 15:26
  • \$\begingroup\$ The sample and hold circuit samples an input, then holds that value until another sample is taken. That prevents the input to the ADC from changing while the ADC is doing its work. \$\endgroup\$ May 27, 2023 at 15:29
  • \$\begingroup\$ ok, last question pls: what does ' the sampling timer sets SAMPCON to the height for the selected sampling period.' mean? what height is being referred to? \$\endgroup\$ May 27, 2023 at 15:34
  • \$\begingroup\$ Height in this case is voltage, I believe. \$\endgroup\$ May 27, 2023 at 16:00
  • \$\begingroup\$ @jsotola good catch. \$\endgroup\$ May 27, 2023 at 16:03

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