I am trying to explain circuit in details, but I can't understand why do we even connect Vcc and Vee or V+ and V- in these inverting amplifier by C3 capacitor.
3 Answers
C3 is a power supply "bypass" capacitor, intended to improve the quality of power supply to the op-amp. It dampens power supply voltage fluctuations caused by changing current demands of both this op-amp and other elements connected to the same supply.
It acts as a local store of charge that the IC can draw upon when its current demands change suddenly, instead of relying on a remote power supply, which might not be able to comply quickly enough, over long resistive and inductive paths.
I don't think it's particularly effective here, with dual supplies. When powered from dual positive and negative supplies, it would probably be better to give each supply its own bypass capacitor to ground, like this:
simulate this circuit – Schematic created using CircuitLab
Bypass capacitors are always connected as physically close to the pins of the IC as possible.
Update: After @mow's comment, I feel I should justify my use of two decoupling capacitors instead of one, when using a dual supply.
The topic is well addressed by @SpehroPefhany in this answer.
If the op-amp's output is sourcing/sinking current to/from ground, then both of the device's dual supplies should be decoupled with individual capacitors to ground, as I showed above. Otherwise, place a single capacitor between the supplies, as shown in the original question.
This ensures that output current flows around the smallest loop area possible, keeping inductance to a minimum, and affects only the supply that's actually being loaded.
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\$\begingroup\$ Not so sure about that. Keep in mind that the opamp's + is connected to GND, and the opamp's reaction to a locally shifted GND due to capacitive coupling of disturbances in the supply might be worse than the reaction to asymmetric supply (common mode). Might even be a feedback loop when the change in supply is caused by the opamp itself. \$\endgroup\$– mowMay 31 at 18:21
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\$\begingroup\$ @mow You make a good point. Everything depends on which rail the op-amp's output sources/sinks current from. There are circumstances in which a single cap between the supplies is appropriate, and I am guilty of a generalisation. I've updated my answer to mention this. \$\endgroup\$ May 31 at 21:53
That is a bypass or power supply decoupling capacitor.
One of the assumptions behind all of the equations for opamp circuits is that the impedance of all power sources, and among all power sources, is zero ohms. No resistance, no capacitive reactance, and no inductive reactance at any frequency in the signal. Of course this is impossible in the real world, but the impedances must be very low.
One of the problems is the inductance of the leads or pc board traces between the power source(s) and the IC pins. Because the impedance of an inductor increases with increasing frequency, this can cause the opamp to behave ... badly at high frequencies. The standard solution is a 0.1 uF ceramic cap from each power pin to GND, located with the shortest possible leads. In many Analog Devices datasheets and app notes, they show a 10 uF electrolytic and 0.1uF ceramic in parallel, to improve the decoupling at medium frequencies.
A standard response of mine to someone with audio power amplifier problems is to ramp up the decoupling. Audio power am ICs are the worst, and are very touchy about decoupling. This is because often there are internal circuit design tricks to boost the available gain at high frequencies. After all, what good is an audio power amp that can make 10 W at 1 kHz, but only 3 W at 15 kHz?
Also, it urns out that the power pin actually is a little feedback path between the output stage and input stage. This, along with those circuit tricks, have enough phase shift and feedback to cause the chip to break into oscillation. The TDA2002 and its family members are notorious for this.
Separate from all of that, another problem is that the output impedance of an amplifier circuit is not perfectly zero ohms; it has a small amount of series inductance. This, combined with any capacitance in whatever circuit or device the output stage is driving, is a 2-pole phase shift network that can be a real headache in high-frequency circuits.
Here are two resources on the topic:
Understanding in-loop compensation for capacitive-loaded OpAmp
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\$\begingroup\$ +1 for the inductance of traces, this explains why decoupling caps should be as close as possible of the concerned IC. \$\endgroup\$ May 31 at 13:08
The OP's question is not directly related to the specific electronic circuit. It is conceptual and can be explained with simple electrical circuits. I will demonstrate it using CircuitLab.
The capacitor property
A charged capacitor has the property of maintaining its voltage unchanged under sudden changes in the current through it, i.e., it behaves as a constant voltage source. But where does this voltage come from?
Because the capacitor is connected between two points (nodes A and B below) of the circuit, when the power is turned on, it is charged to the average value of the voltage between the points. For this to happen, an important condition is that there is a path for the charging current to flow. In the example circuit below, one point A (on the left) represents the output of a perfect AC + DC voltage source Vin and the other point B (on the right) is the output of an imperfect DC voltage source (a voltage divider assembled by the resistors R1 and R2 in series).
simulate this circuit – Schematic created using CircuitLab
Imagine that Vin = 0 V in the beginning. At the moment 1 s, Vcc is turned on and half of its voltage should appear at the output of the voltage divider. But since the capacitor C appears to be connected in parallel, it begins to charge through the input source Vin to the final voltage of 5 V.
Thus, the two points are connected by a constant "shifting" voltage source Vc. This capacitor property can be used for various purposes according to which the capacitor is called by the appropriate names. Let's take a look at them.
Coupling capacitor
If the voltage at one point A changes alternatively, the voltage at the other B will follow it (if, of course, the resistance between the point and supply rails is not too low). Thus the two points are connected by the capacitor (in the sense that the capacitor transmits the voltage variations); hence the name "coupling capacitor". This property is used in capacitive coupling AC amplifiers.
In the simulation below, Vin = 1 V (AC). After the power is turned on, it begins to shift upwards until its average value reaches 5 V.
When Vcc and Vc are established...
... Vb and Va are offset by 5 V.
Note that in this configuration, the capacitor is connected in series (as a "bridge") between the point A acting as a source and the point B acting as a load.
Decoupling capacitor
In this application, the capacitor should break the connection between the two points (in the sense that there is no signal transfer between the two points). But it cannot do so in series (an inductor can do it); therefore we connect it in parallel to the "receiver" point (i.e. between the point and ground, as a shunt).
In this experiment, the input source Vin is imperfect (it has an internal resistance Rin = 1 kohm). Its voltage is equal to the voltage of the right source which is improved through the capacitor C in parallel.
When the power is turned on at time 1 s, the capacitor is charged as above to 5V (AC Vin = 0 V).
The output voltage of the imperfect voltage source (voltage divider) is fixed by the capacitor and it behaves as a perfect voltage source.
As a result, the voltage of point B does not change when the input voltage at point A varies as if the connection between them is broken by the capacitor...
... hence the name "decoupling capacitor". Since this name is somewhat misleading, more appropriate names such as "bypass capacitor" are also used. Note that here we suppose the input voltage source has some internal resistance.
OP's circuit
Let's now try to figure out the function of the capacitor C3 connected between the two supply voltage sources (Vcc and Vee) in the OP's schematic.
To model the OP's circuit, we add another voltage divider R3-R4 supplied by another but negative voltage source Vee. To simulate the voltage variations of the two power sources, we use functional generators with a DC voltage of 10 V and an added AC voltage of 1 V. The outputs of the two real power sources (voltage dividers) at points A and B are connected through the capacitor C. According to the classification above, it should be a "coupling capacitor" connecting two voltage sources. But if we imagine that the two sources are connected (through ground) in series and in the same direction so that their voltages are summed, then C3 can be thought as a "bypass capacitor" connected in parallel to this composite source (Vcc and Vee).
The problem with this connection is that it only works when the voltage magnitudes of the two sources simultaneously try to increase or decrease.
If the voltage of one of them increases and the other decreases, the total voltage does not change and there is no need for the capacitor to intervene.
It is as if there is no capacitor and the fluctuations are maximum.
Therefore, the better option is to connect a separate "bypass capacitor" in parallel to each source.
Thus, there are no ripples in both the first...
... and the second case.
Conclusions
- A charged capacitor behaves as a constant voltage source:
- if connected in series to a varying voltage source, it transfers its voltage variations;
- if connected in parallel to an imperfect voltage source, it makes its voltage constant.
- Probably, the OP's circuit is a mistake made due to the mechanical application of a rule.