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I recently came across the ICE40UL1K-SWG16ITR1K (Please see DigiKey, DE) 16-Pin FPGA.

This Device "packs an amazing punch" for its size:

  • 57kBits of RAM
  • 1248 Logic-Cells
  • 156 LABs/CLBs and is relatively "price-neutral" with 2€/pc on a 1k Reel through DigiKey.

In conclusion: I can come up with "many cool stuff" to do with it in my mind.

So...

I struggle to come up with specific use cases, as the device has so few IO/s. According to the Datasheet (Page 33, Table) it has only 10 of them.

As I read the "Intro-Page", the device is intended for some sort of remote/barcode scanner/IR transceiver scenario.

But:

Wouldn't a "off-the-shelf" ARM M0/M3 be much more cost effective?

  • Lower IC costs in volume
  • No need for external Flash
  • Lower development cost for Software compared to HDL
  • Easier code maintenance
  • More flexibility in software (Remote updates e.g without additional MCU to control the FGPA-Flash)

Question:

  • What are the advantages of such an FPGA (Low-Pin count, high complexity in general) over an MCU?
  • In which Applications are such devices favored over the general "MCU-Approach"?
  • What points/features/advantages/... am I missing in my "glance at the device"?
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  • \$\begingroup\$ The IR LED transceiver functionality is pretty self explanatory and would fit well with only a few IOs. What I find perplexing is the RGB LED drive functionality as surely an FPGA is overkill to blink colored lights? \$\endgroup\$ May 31, 2023 at 0:29
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    \$\begingroup\$ lets say you want to build a jumbotron out of addressable RGB LEDS you have LVDS in and PWM-binary-code (whatever it's called) out pin-count is low but throughput is high, \$\endgroup\$ May 31, 2023 at 3:29
  • \$\begingroup\$ Consider a complex, time-critical, deterministic "gate", whose 5 outputs depend on 4 inputs (for example), as well as on the history of all these states via an IIR filter. \$\endgroup\$
    – tobalt
    May 31, 2023 at 3:48
  • \$\begingroup\$ @user1850479 As you mentioned it: I agree! \$\endgroup\$ May 31, 2023 at 6:26
  • \$\begingroup\$ @JasenСлаваУкраїні Hmmh seems like a good application - but why not use a uC with a e.g SPI Interface? Is simpler, more flexible, and lower cost (first estimate...) \$\endgroup\$ May 31, 2023 at 6:27

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Serial protocols can be timing-critical and complex enough that you can't do them on a microcontroller reasonably, but they only need few IO lines and often very little memory.

As an example, consider a custom USB-to-synchronous serial adapter. USB peripherals can typically be found in microcontrollers, but the fact that you might need special timings, or to adhere to a very specific external clocking, or to interleave your data just at the right point on that synchronous bus will make it impossible to just use the SPI/USART peripheral of any existing microcontroller.

Examples of such systems include the E1 (a synchronous serial bus used to relay information between GSM base stations and other things). This video might shed some insight on how the designer of that board used an ICE40 FPGA for that purpose. You'll find it interesting that he decided to implement the USB state machine in the FPGA itself, and that in the end, to control the higher-level data flow, a "off-the-shelf" CPU softcore was implemented in the FPGA.

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  • \$\begingroup\$ Wow...Thank you! Great Link! \$\endgroup\$ May 31, 2023 at 13:45

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