I was inspecting the output of a 22 V to 5 V buck with my oscilloscope that I integrated into a PCB, and I was wondering what I could do wrong.

Here is the electrical schematic:

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Here is the layout (ground plane is below):

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Here is a picture of the real PCB:

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Here is a picture of what the oscilloscope sees:

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Probe: enter image description here

Link to the datasheet: https://datasheet.lcsc.com/lcsc/2303010230_Texas-Instruments-LMR50410Y5FQDBVRQ1_C2871822.pdf

Please note that adding an external electrolytic capacitor of 1000 uF cleans out the signal.

Any idea what I did wrong? Thanks a lot in advance

  • 1
    \$\begingroup\$ We should rule out any issues with probing, what type of probe are you using? Where on the PCB are you connecting your ground? \$\endgroup\$
    – Entropy
    Jun 1 at 7:17
  • 2
    \$\begingroup\$ The ground route really wants to be as short as possible (that's why they make them so annoyingly short on the probes!), this minimises the loop area of the probe and reduces the amount of noise that gets picked up. I think your current method looks to be very long, is there any way you can get the black clip to connect directly to a ground pin/pad? \$\endgroup\$
    – Entropy
    Jun 1 at 7:42
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    \$\begingroup\$ Routing from inductor to the output capacitor should be as short as possible, just like the switch node. If you can, place the bootstrap capacitor as close to the IC as possible. And rotate the choke ccw and place next to the Cboot. Re-route the connections and this will make the output node shorter and reduce possible noise pickup. I'm aware of the fact that you can't make these changes on the existing board but it's a further suggestion for the next rev. Output capacitor is supposed to be a ceramic (MLCC) which normally doesn't show a significant ESR, unlike the alu electrolytics you used. \$\endgroup\$ Jun 1 at 8:19
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    \$\begingroup\$ 1. Your ground clip needs to be much shorter. Google "oscilloscope pigtail method". 2. Your layout should be tighter and have MLCCs in parallel to your electrolytics. \$\endgroup\$
    – winny
    Jun 1 at 8:40
  • 1
    \$\begingroup\$ What kind of electrolytic capacitors are these? General purpose? Capacitor ESR is going to be extremely high. Example video of proper probing technique as suggested by winny. \$\endgroup\$
    – bobflux
    Jun 1 at 14:28

3 Answers 3


To check high frequency signals on an oscilloscope you should use the X10 probe with ground spring for lowest inductance on the ground connection. Using the alligator clip lead will often result in ringing, out-of-shape signals, or common mode to differential conversion. The wire loops can also catch stray fields from the inductor/PCB. So the scope can display noise that isn't actually there. At 1µs/div on the scope it should not be too bad, but if you go faster it matters.

enter image description here

Without a load at the output, these buck chips can enter a low power mode and cycle between sleeping then bursts of switching. In this case, output ripple voltage is slightly higher, it depends mostly on the hysteresis of the internal comparator that controls sleep mode entry/exit. When there is enough load on the output to push the chip out of power-saving mode, it will switch continuously and ripple voltage will be lower. So make sure you know which mode the chip is using. You can use a load resistor on the output to draw say 50mA to force it to run in continuous mode.

The input current of a buck converter looks like a square wave with sloped tops as shown on the second plot in this image (source):

enter image description here

This input current has very high di/dt as the internal MOSFET in the buck chip switches, which means:

  • Any series inductance L due to the input cap plus traces will create voltage drop: \$ e=L \frac{di}{dt} \$

  • ESR in the input cap also creates voltage drop : \$ V_{drop} = ESR.\Delta I \$

The output cap handles the inductor current which is a sawtooth, so it is less critical. If the output cap is weak you will get more ripple. But the input cap really is important, if it is badly chosen it won't work at all. Here's why:

A typical 10µF MLCC has an ESL of ~1nH, say 2nH with some short traces, and very low ESR around a few milliohms.

The caps you used, if they're general purpose aluminium, should have ESL around 2-4nH and ESR of a few ohms to a few tens of ohms.

Usually for general purpose caps, ESR is specified using dissipation factor at 120Hz and 25°C. So your 10µF cap would have 13-26 ohms ESR at 120 Hz, 25°C. Actual ESR depends on frequency and temperature, here's an example:

enter image description here

So, ESR at your switching frequency will be lower than the value calculated from datasheet dissipation factor, especially if the capacitor is hot. Looking at the ripple on the scope plot (about 1V) and the inductor ripple current calculated from inductor value and input/output voltages (400mA) it seems the cap has an effective ESR around 2-2.5 ohms. It's better than 13 ohms, but it doesn't matter: it's still 100 times too high.

The shape of the scope trace provides a hint: it's a sawtooth, just like inductor current. If the voltage has the same waveform as the current, it means the cap doesn't act like a cap, it acts like a resistor! ESR is so high that the cap doesn't smooth the voltage at all. With a low ESR capacitor, the cap would actually smooth the output voltage, and it would no longer look like a sawtooth: a capacitor integrates current into voltage, and turns a sawtooth current into a piecewise quadratic voltage. On the scope this looks more like a sine, with "rounded" tops and bottoms.

So, on the ESR alone, it's not going to work at all. ESR is way too high, and when the internal MOSFET turns on, input voltage is going to drop significantly. In the worst case I've seen, input voltage dropped enough to trigger the undervoltage detection of the chip, so it would reset, wake up, think it's just been powered up, and run the whole soft-start again. This resulted in a sawtooth output voltage.

You should probe the input voltage right at the chip (using the tiny ground spring on the probe) to assess this. If I'm correct about the problem being the ESR, you should see a lot of ripple voltage.

The footprint pads on your PCB should be close enough to remove the electrolytic caps and solder some 1206 MLCCs or maybe 0805 instead. Use the recommended values from the datasheet, or higher.

It won't fix the layout, which is not optimal, but it should work a lot better with ceramics. If you don't have 2.2µF you can stick 2x 1µF on top of each other or side by side, or use a larger value. Doesn't matter if it's ugly, this is mainly to check if it works better. MLCC size doesn't matter since most of the inductance will be in the traces. Just use whatever you have as long as it has enough µF and it fits.

Note that ESR of a electrolytic capacitor increases a lot when it's cold (shown on above graph), this is due to the liquid electrolyte losing its performance when cold. Ceramics are fully solid so they do not have this drawback, although capacitance varies with temperature ; X7R/X5R perform well in a wide temperature range but cheaper Z5U/Y5V variants, not so much.

Since you're powering this with wires which do have inductance, I strongly recommend adding an electrolytic cap at the input for damping, whatever value comes out of the parts bin will be fine as long as it's 100µF or more.

Once you do that the buck converter should work. High frequency noise due to sub-optimal layout should be mostly spikes at switching, which you may or may not see on your scope depending on how much bandwidth it has. This chip probably switches in a few tens of nanoseconds or less, which will create noise spikes of similar duration... so if the scope and the probes don't have several hundreds MHz bandwidth and the necessary rise time, you can't trust what you see on the screen.

Note the datasheet paragraph "8.3.3 Enable" says the chip has an accurate voltage threshold on the enable pin. So you can use a voltage divider from Vin to make sure the chip starts at, for example Vin>6V, to ensure the output is either clean 5V or 0V. Otherwise, by tying Vin to EN, if Vin is lower than 5V it will still start but it will not be able to output 5V.

  • 1
    \$\begingroup\$ +1 for suggestion to use existing pads for chip capacitors. quick and easy way to make sure everything works without paying and waiting for new PCB. Also great point about no-load behavior. \$\endgroup\$
    – Maple
    Jun 1 at 15:12
  • \$\begingroup\$ Can you explain the observed waveform (2Vpp ~400kHz) with respect to the probe ground? Given the lead length shown, what is the maximum expected error due to ground inductance at a given frequency? Assume the common mode is really bad say Vcm = 1V. \$\endgroup\$ Jun 1 at 15:33
  • \$\begingroup\$ "So, on the ESR alone, it's not going to work at all" -- I don't see how this follows from the proceeding paragraphs; some stray values are given, but they are not related back to the functional requirements of the device in question. We don't know load current (as of this comment) so the values are arbitrary; if it were 10mA say, a few tens of ohms wouldn't be a problem at all! \$\endgroup\$ Jun 1 at 15:34
  • \$\begingroup\$ @TimWilliams Assuming general purpose caps, tan delta 0.1--0.2 gives max 13-26 ohms ESR for 10u output cap, 50-100 ohms ESR for 2.2u input cap. So with 22V in, 5V out, L=4uH we get 0.39A inductor ripple current in FPWM mode, >5V ripple on the 5V output (ie "not working") and >19V ripple on the input. The scope shot shows ~1V ripple on the 5V output so the actual cap on the board must have lower ESR, maybe around 2 ohms, which is better, but still 1V ripple on 5V is "not working" ;) \$\endgroup\$
    – bobflux
    Jun 1 at 17:04
  • \$\begingroup\$ Big hint is the shape of the scope trace: it's a sawtooth, just like inductor current, you can even see the duty cycle on it (which looks the proper value). If the voltage has the same waveform as the current, it means the cap isn't a cap, it's a resistor! ESR is so high that the cap doesn't smooth anything. With a low ESR capacitor, the cap would actually smooth the output voltage, and it would no longer look like a sawtooth: a capacitor integrates current into voltage, turns sawtooth current into piecewise quadratic voltage, ie visually more like a sine, with "rounded" tops and bottoms. \$\endgroup\$
    – bobflux
    Jun 1 at 17:10

The datasheet goes into a lot of detail about picking components:

The LMR50410 device requires a high frequency input decoupling capacitor or capacitor. The typical recommended value for the high frequency decoupling capacitor is 2.2 µF or higher. A high-quality ceramic type X5R or X7R with sufficiency voltage rating is recommended. The voltage rating must be greater than the maximum input voltage. To compensate the derating of ceramic capacitors, a voltage rating of twice the maximum input voltage is recommended. For this design, one 2.2-µF, X7R dielectric capacitor rated for 50 V is used for the input decoupling capacitor. The equivalent series resistance (ESR) is approximately 10 mΩ, and the current rating is 1 A. Include a capacitor with a value of 0.1 µF for high-frequency filtering and place it as close as possible to the device pins.

You ignored the "requires" parts, which is a bad idea.

Also, a general guideline, electrolytic capacitors provide very high capacitance and can (often) tolerate high voltages but don't work well at high frequencies. You're building a low voltage, high frequency switching power supply that requires tiny capacitors. The datasheet is explicit on capacitor selection, but even if it wasn't, selecting a 2.2 uF electrolytic would not make sense.

Try laying out the circuit again using a 1206 or 0603 MLCC for the input capacitor and one 1206 or maybe two parallel 0603s for the output. Keep the loops through the caps as tight as possible. The datasheet provides equations for calculating the exact values for a given ripple, so you can double check the values given how much noise you can tolerate. I think your inductor value is reasonable, but can double check that as well.

  • \$\begingroup\$ Indeed. Having larger electrolytics can be helpful, but the small ceramic capacitors are very much required for a design at this frequency. And it is not a bad idea to have more capacitance than the minimum specified (though too much can make some chips unstable). \$\endgroup\$
    – jpa
    Jun 2 at 16:34

After replacing the Cout capacitor with an MLCC of 25V rating, 10uF 1206 the output looks much cleaner. I tried with 22V as input and up to 150mA as output. I will update my new revision changing both Cin and Cout in the future Here is a screenshot of the oscilloscope:

enter image description here

Two relevant videos here: https://youtu.be/LUfB0Fl4bKc https://youtu.be/hWaN7h5eWfc


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