I have one FPGA (Artix-7 XC7A100T-2CSG324C) connected by a PCB trace to another FPGA (Artix-7 XC7A100T-2CSG324C.)
The PCB trace is 3.4 meters long, 0.154mm wide, 0.185mm high from GND plane. The dielectric between signal and ground planes has Dk=3.6 and height of 0.15mm, and a 0.035mm trace height.
This signal is on its own separate layer. Above is a power plane and below is a ground plane. On the same layer, there are ~4 other signals similar to the one discussed here. Additionally, there is a LVDS signal (1 MHz) that is separated from these signals by a GND infill on the same layer.
I want to know if I switch the FPGA output to a HIGH (3.3V), would the other FPGA be able to see the HIGH (3.3V)? In the end, I am looking at something around 9600 bits per second, but if I can operate at a faster frequency then I won't be upset.
Initially thinking through this problem, I imagine that the PCB trace is too long for the HIGH to be seen, so I want to know the best way to make that HIGH seen. I have been looking around and I have seen people talk about buffers. I don't know how to select a buffer and what information is needed when selecting a buffer for this application.