I am trying to complete Problem 4 of this MIT Computation Structures lab, which requires you to use a circuit simulator called Jade to build a sequential logic circuit that implements the below FSM:

So far, the below is what I have:

enter image description here

I'm trying to implement this using the ROM/register combo that is referenced in the problem (and on the lecture slides the problem references).

However, I'm not sure how to connect the U and V outputs. The ROM/register combo shown in lecture looks a bit different, as it has a separate spot for inputs and outputs:

enter image description here

Does anyone have any thoughts on how I might be able to implement that in Jade?

  • \$\begingroup\$ I don't know Jade and I'm certainly not going to go learn how to use it (tools, semantics and syntax, etc) just to solve this problem for you. Luckily, you just seem stuck on the U and V parts. Why not include those as part of the ROM and simply capture them with DFFs along with the next state at the rising edge of the clock? \$\endgroup\$ Jun 4 at 3:56
  • \$\begingroup\$ The bottom diagram shows inputs&outputs connected to the lookup table. The top one does not (depending on whether IN is initial or input). \$\endgroup\$
    – greybeard
    Jun 4 at 7:38
  • \$\begingroup\$ Coder, Since you are non-responsive, I'll just hand you an answer but one that doesn't use a ROM. If you help us help you, I may write more in an answer. \$\endgroup\$ Jun 5 at 1:39
  • \$\begingroup\$ Appreciate the responses. Very busy day today so haven't had a chance to take another crack at this problem today but hope to have some time tomorrow. \$\endgroup\$
    – Coder1913
    Jun 5 at 3:14
  • \$\begingroup\$ @Coder1913 Okay. When you get a moment, then... \$\endgroup\$ Jun 5 at 21:31

1 Answer 1


Let's start by assigning state numbers to each state:

enter image description here

My reasoning here is that \$U\$ is just a copy of the most significant DFF. That makes \$U\$ easy to produce. Next, I decided that \$V=1\$ when both of the less significant DFFs are zero. That's also easy to produce.

From here it is now possible to create a table:

$$\begin{array}{c|c|c} \text{State} & \text{IN} & \text{New State}\\\hline\\ {\begin{smallmatrix}\begin{array}{ccc} Q_C & Q_B & Q_A\\ \\ 0&0&0\\ 0&0&0\\ 0&0&1\\ 0&0&1\\ 0&1&0\\ 0&1&0\\ 0&1&1\\ 0&1&1\\ 1&0&0\\ 1&0&0\\ 1&0&1\\ 1&0&1\\ \\ 1&1&0\\ 1&1&0\\ 1&1&1\\ 1&1&1 \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{c} \\ \text{ }\\0\\1\\0\\1\\0\\1\\0\\1\\0\\1\\0\\1\\\\0\\1\\0\\1 \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{ccc} Q_C & Q_B & Q_A\\ \\ 0&0&0\\ 0&0&1\\ 0&1&0\\ 1&0&0\\ 0&1&1\\ 1&0&1\\ 1&0&1\\ 1&0&0\\ 0&1&0\\ 0&1&1\\ 0&0&0\\ 1&0&1\\ \\ x&x&x\\ x&x&x\\ x&x&x\\ x&x&x \end{array}\end{smallmatrix}} \end{array}$$

That table should be very easy to stick into a ROM along with the associated \$U\$ and \$V\$ values. You could either latch them from the ROM output at the time of the clock-driven state transition or else derive them from the current address presented at the ROM address bus prior to the next clock.

Alternately, you avoid the ROM and instead just produce the Karnaugh maps:

$$\begin{array}{rl} \begin{smallmatrix}\begin{array}{r|cccc} Q_C\text{ }D&\overline{Q_A}\:\overline{IN}&\overline{Q_A}\: IN&Q_A \:IN&Q_A \:\overline{IN}\\ \hline \overline{Q_C}\:\overline{Q_B}&0&0&1&0\\ \overline{Q_C}\:Q_B&0&1&1&1\\ Q_C\:Q_B&x&x&x&x\\ Q_C\:\overline{Q_B}&0&0&1&0 \end{array}\end{smallmatrix} & \begin{smallmatrix}\begin{array}{r|cccc} Q_B\text{ }D&\overline{Q_A}\:\overline{IN}&\overline{Q_A}\: IN&Q_A \:IN&Q_A \:\overline{IN}\\ \hline \overline{Q_C}\:\overline{Q_B}&0&0&0&1\\ \overline{Q_C}\:Q_B&1&0&0&0\\ Q_C\:Q_B&x&x&x&x\\ Q_C\:\overline{Q_B}&1&1&0&0 \end{array}\end{smallmatrix}\\\\ \begin{smallmatrix}\begin{array}{r|cccc} Q_A\text{ }D&\overline{Q_A}\:\overline{IN}&\overline{Q_A}\: IN&Q_A \:IN&Q_A \:\overline{IN}\\ \hline \overline{Q_C}\:\overline{Q_B}&0&1&0&0\\ \overline{Q_C}\:Q_B&1&1&0&1\\ Q_C\:Q_B&x&x&x&x\\ Q_C\:\overline{Q_B}&0&1&1&0 \end{array}\end{smallmatrix} \end{array}$$

And work out the logic required for that from the usual means of minimizing logic from those tables.

  • \$\begingroup\$ Thank you for the very detailed and helpful response. This definitely has me on the right track. I think now the main thing is just digging into Jade and figuring out how to implement it there. It's not the most intuitive simulator, but I think I'm close. \$\endgroup\$
    – Coder1913
    Jun 6 at 2:39
  • \$\begingroup\$ @Coder1913 Best wishes. I hope it does help you get where you need to go with it. :) You might consider posting up the resulting Jade code so that I can learn something about Jade from you. ;) \$\endgroup\$ Jun 6 at 2:42

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