When [input x changes also] the FF state will change
no, not when A is a flip flop. State will be replaced as a consequence of clock signal changes - by the same state, or a different one.
Based on which state do we decide the output?
There is just one state at any one time. There may be signals at the inputs of storage elements determining in conjunction with the clock signal what the one and only state will be next.
A=1, A'=0. Let's say we give 1 as x input. Then the output y will change to 1.
I beg to differ: I see an EXOR with both inputs 1, y should be 0.
after that the FF state will change to A=1, A'=0. So the output will change again, this time to
Which output is correct?
The FF state A will change to 1 following the appropriate change in the clock signal: there is a 1 at input D.
Both output signals are correct: They belong to different machine states.
A (finite state) machine with outputs depending asynchronously on inputs has been formalised as a Mealy machine.
A machine with outputs depending on state, only is a Moore machine(, too).
For "best synchronicity", each output is a register output - no intervening circuitry.
To muddle things, state machines can be realised with "transparent latches", latch output depending on input at one clock level, independent of input at the other clock level.