How and why is "floating input" a valid state for RF/IR encoder IC's?

Question

RF/IF encoder/decoder IC's such as this one, will accept the address-pin in one of 3 states:

• Floating
• High
• Low

As per this excellent answer, I believe "Floating" input can assume either High or Low value due to variations in the EM field, if I understood it correctly. If so, then why if floating a valid state ? At the time the IC is reading the value of the pin, how does it determine that the pin is really pulled HIGH or LOW, versus a floating-pin that was inadvertently pulled up/down such as due to ambient EM noise (I'm assuming that such a thing is possible).

Also in line with the question in the context of which the above mentioned answer was given, can someone explain, through non-technical analogy, the difference between weakly pulled up/down versus strongly pulled up/down ?

Answer 1

Weak pullups are overridden by strong pullups. For a non-electronic analogy, imagine the weak pullup as a weak spring and a strong pullup as a strong spring, connected to some lever. You can drive the lever away from the pullup, but doing so requires effort. Letting go of it will return the lever to its resting position. The greater the strength of the spring/pullup, the faster the lever/signal recovers.

Edit: wrote that analogy without reading through to the linked page, which has essentially the same analogy.

I think this particular IC is actually using "floating" to implement a ternary coding system for addresses. So a binary system has notionally one threshold voltage:

• above threshold: HIGH / 1
• below threshold: LOW / 0

The ternary has two:

• above high threshold: HIGH / 2
• below high threshold, above low threshold: MIDDLE / 1
• below low threshold: LOW / 0

I suspect that internally it has two large bias resistors connected to each pin, and that if you probe it you'll find them at half the supply voltage (you may need to make sure it's not in standby mode for this).

Answer 2

As pjc50 indicates - they are not really floating - when disconnected they are pulled to an internal position by internal resistors or equivalent.

You can give a mechanical analogy BUT in this case you should have no trouble with a suitably electrical explanation.
Imagine that a pin has a 100k internal resistor to V+ and a 100k internal resistor to ground. If there is no other significant load on the pin externally or internally then the pin will be at V+/2.
If you now ground the pin it will be at ground potential. Even a 100 ohm or 1000 ohm to ground will result in a voltage so close to ground as to be low for any logic system. Even a 10k resistor to ground will result in about V/11 above ground.

Similarly, if you connect the pin highh it will be high.
A 100R, 1k or 10k to V+ will resut in a logic high for practical purposes, and a 10k will in most cases.

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Thus, with 3 states = a ternary system, pins can be either

• externally pulled high

• or externally pulled low

• or internally pulled to the middle position.

The advantage is that with

• 2 levels and N inputs you get 2^N states and

• 32 levels and N inputs you get 3^N states

so the ratio is 3^n / 2^n = 1.5 ^ n times as much.

This increases the number of states immensely as N gets large. Being able to get 25+ times as many states with 8 input bits is "very useful".
To get 6561 states with 8 binary bits you'd need 13 bits.

The table shows the number of states using N pins of binary and ternary encoding,
The ratio between the two
The number of binary bits you'd need to get as many states as ternary gives (round that up ) and
The effective number of bits you gain (round that up too).