# Op-Amp's offset voltage and bias current

The following Op-Amp is ideal, except of an offset voltage at the input : Vos = +-10mV, and a bias current: Ib = 10uA.

I am supposed to find the value of R in order to compensate for the effect of Ib and determine, under these conditions, the total voltage deviation at the output.

I don't understand how Vos and Ib relate.

Does "compensate the effect of Ib" means aproximate Ib to zero?

This is the first exercise i am solving using Vos and Ib so i am a little confused and would apreciate any help on how to start solving this problem.

• Vos and Ib are simply nonidealities of the design. The input pair of the op-amp is not perfectly symmetrical, so, for a 0V output, they'll need some voltage difference between its input nodes. Ib is simply the bias current that your (+) and (-) input need in order to function. It's not surprising to get nA into the inputs for CMOS input pairs. The ideal model we usually calculate with assumes no current flows into the inputs. Hence, we need to model Ib as external current sources. Commented Jun 9, 2023 at 21:19
• Ib will always exists. What compensates the effect of Ib means is that, when you calculate towards the output, you'll have an Ib term multiplying by a resistance. This creates an offset. If you do the math right, you can find a resistor that will cancel this term. Commented Jun 9, 2023 at 21:20

Input offset voltage is an inherent flaw in the op-amp's treatment of potentials at the input. It is unrelated to input bias current, which I will talk about in a moment.

If the op-amp has open loop gain $$\A\$$, and non-inverting and inverting input potentials of $$\V_{NINV}\$$ and $$\V_{INV}\$$ respectively, then ideally you would like to have the relationship

$$V_{OUT} = A(V_{NINV} - V_{INV})$$

Unfortunately, due to inevitable asymmetry in the op-amp's internal architecture, the actual relationship has a slight offset $$\V_{OS}\$$ in the term $$\V_{NINV} - V_{INV}\$$, so that when the inputs have the same potential, the output is not actually zero:

$$V_{OUT} = A(V_{NINV} - V_{INV} + V_{OS})$$

This offset can be modelled with a voltage source representing this "shift" in potential at one of the inputs:

simulate this circuit – Schematic created using CircuitLab

As you can see, the closed loop gain of this amplifier is $$\1+\frac{R_1}{R_2}=100\$$, and the output is shifted upwards in potential by $$\100 \times V_{OS} = 1V\$$, even though the input $$\V_{IN}=0V\$$. Notice how the op-amp has successfully equalised its two input potentials (as expected with negative feedback), but that "equality" is +10mV different from $$\V_{IN}\$$, shown on VM1.

In other words, the output is offset by an amount equal to the product of closed-loop gain and input offset voltage. After bandwidth, I would say that input offset voltage is the biggest source of grief for engineers.

Sometimes the op-amp provides a means of restoring symmetry to some extent, allowing you to manually adjust this offset until $$\V_{OS} \approx 0V\$$, a feature called "offset null", or "balance". If that feature isn't present, and input offset voltage is a problem (which is often the case in high gain or multi-stage DC-coupled amplifiers), you'll have to artificially introduce an offset yourself, outside the op-amp, either prior to (at the input) or following the op-amp, to compensate for $$\V_{OS}\$$.

Input bias current is a different phenomenon, but has similar consequences. It's not really a problem with FET input op-amps, since input current is so small, but with bipolar input op-amps, that current can be significant, and problematic. Like input offset voltage, input bias current can result in a voltage offset. Consider this system in which I model a voltage source (the signal being amplified) with impedance 10kΩ:

simulate this circuit

The op-amp draws 1μA of current (shown on AM1) from the source V1, current which must pass through the source's own impedance. That impedance of 10kΩ develops $$\V = IR = 1\mu A \times 10k\Omega = 10mV\$$ (shown on VM1), and causes the voltage "seen" by the op-amp to be 10mV lower than $$\V_{IN}\$$, at 990mV (shown by VM2).

This voltage offset is similar in effect to input offset voltage $$\V_{OS}\$$, but is easier to deal with. The solution is to introduce a similar offset at the other input. If we assume that the other input draws similar current (which is approximately true for most op-amps), then all we have to do is introduce a similar impedance in that path too. That impedance will also develop a similar potential difference, and both inputs will have the same offset in potential, effectively cancelling the effects of input bias current.

For your own circuit, the trick is to find out the effective source impedance of the feedback path consisting of resistors 10kΩ and 100kΩ, and then duplicate that impedance at the other op-amp input. You're probably aware that this system of resistors can be reduced to a Thevenin equivalent:

simulate this circuit

The equivalent Thevenin resistance $$\R_{TH}\$$ is the parallel combination of $$\R_1\$$ and $$\R_2\$$, which is:

$$R_{TH} = \frac{R_1R_2}{R_1 + R_2} = 9.09k\Omega$$

Viewed from this perspective, it's clear that there is effectively a resistance of 9.09kΩ between the op-amp's output $$\V_O\$$ and its inverting input $$\V_{INV}\$$, and that this resistance will develop an unwanted potential difference due to bias current drawn by the op-amp's inverting input.

To duplicate the same offset at the other input $$\V_{NINV}\$$, all you need is a resistance of 9.09kΩ in series with that input too:

simulate this circuit

You already have 600Ω in place, so $$\R\$$ will have to combine with those 600Ω to total 9.09kΩ

Does "compensate the effect of Ib" means aproximate Ib to zero?

Not quite. There are two effects at play here. Starting with the bias current first - while an ideal op amp neither sources nor draws current at its input pins, your op amp does - specifically, a current of 10 microamperes in each of the two input pins.

There's a driving resistance "seen" at the input pin: the non-inverting input sees a driving resistance of 600 ohm + R, and the inverting input sees a driving resistance of 100k || 10k. A resistance and a current across that resistance leads to a voltage drop, and this voltage drop causes the voltage at the input pins to change slightly. This produces a small voltage on each pin, and hence a net offset (the difference in the offsets of the two pins).

The second offset is the inherent input offset voltage of the op amp - this is a consequence of manufacturing asymmetry between the circuitry behind each of the two pins, and is known to be 10 mV.

While I will refrain from giving a fully worked answer here, this should be enough to get you started on solving the problem.

Does "compensate the effect of Ib" means aproximate Ib to zero?

No. It means that you need to add circuit elements - in this case a resistor - to make the circuit behave as-if the bias current was zero in spite of it not really being zero.

I don't understand how Vos and Ib relate.

In the usual fashion: Ohm’s law.

The key point is though that the “Vos” in your question is not the same as Vos from the datasheet. The Vos from the Ohm’s law, due to bias, is a secondary offset voltage in series with op-amp’s internal input offset voltage.

So it’s not op-amp’s Vos that relates to op-amp’s Ib. It’s $$\V_{OS2}\$$, and it add’s to op-amp’s internal let’s call it $$\V_{OS1}\$$, to yield an effective circuit-specific offset that’s the series combination (sum) of the two.

Ib flows through the Thevenin equivalent of the input impedance presented at the input pin. The voltage drop across it adds to the op-amp’s own offset voltage, and makes the resulting circuit behave as-if the offset voltage was different from what you’d get from the op-amp alone if the op-amp was “seeing” zero impedances on both inputs.

To null out the output offset caused by the input bias currents you must make the resistances looking out from the op amp's inputs equal to each other.

So, 600 + R = 100k//10k and solve for R.

For this to work exactly, the two input bias currents must be equal to each other but in a practical circuit there will be a small difference between them which will result in some residual output offset voltage, even if the two resistances are perfectly matched. This difference between the two bias currents is known as the input offset current. I think in your case you are expected to assume that the input bias currents are equal to each other and therefore, if the two resistances are matched, there will be no output offset due to the input bias currents.

The output offset voltage which results from the input offset voltage is equal to the input offset voltage multiplied by the noise gain (non-inverting gain).

So, output offset voltage due to input offset voltage = Vios * 1+( 100k/10k) = 10 mV * 11 = 110 mV.

The bias current flows into both inputs and causes a voltage across the input resistance. So for a net offset voltage of 0 caused by the bias current, you want to have both inputs "see" the same resistance against the voltage rail sourcing/sinking the bias current. For most practical purposes this should be indistinguishable from resistance against ground or any other fixed voltage. This is independent of Vos, the offset voltage measured for a net bias current difference of 0.