simulate this circuit – Schematic created using CircuitLab

I am trying to make a 3-bit up/down counter, after failing to use xor IC I resorted to AND and NOR ICs, but the result of the IC starts turning off halfway through the positive half of cycle, and also the second flip-flop only sometimes triggers. And sometimes while changing wires on the right the 555 clock on the left stops triggering (or the first flip-flop stops triggering) From the left the ICs used are: NE555P HD74LS73AP SN74HC08N SN74HC02N HD74LS73AP (Not connected yet) cycle start

cycle mid

cycle wnd

  • 1
    \$\begingroup\$ Welcome! Please post a schematic. \$\endgroup\$
    – winny
    Jun 11 at 20:31
  • \$\begingroup\$ @winny I believe the correct schematic has been added. \$\endgroup\$ Jun 11 at 21:00
  • 2
    \$\begingroup\$ Tying LEDs from a "logical output" without a resistor isn't a good idea. A red LED from output to GND almost guarantees it doesn't even reach TTL input high level. \$\endgroup\$
    – greybeard
    Jun 11 at 21:46
  • 1
    \$\begingroup\$ Umm - what delay does the title mention, and what is your answerable electronics question? \$\endgroup\$
    – greybeard
    Jun 11 at 21:50
  • 1
    \$\begingroup\$ [power supply] decoupling capacitors need to go as close to the power supply pins as feasible - I had small polar&ceramic ones in the middle of the breadboard power rails, + about one for&at every IC. DO NOT leave C-MOS inputs open as SW1 may be doing. (It probably isn't wired to short +6 V to GND - or is it?) \$\endgroup\$
    – greybeard
    Jun 12 at 10:44

1 Answer 1


Are you using both HC and LS devices? It's not a good idea to connect 74LSxx outputs into 74HCxx inputs. TTL is weakly high. HC needs something more for a high to be reliable. If you must combine these families, use HCT not HC.

Moving on and assuming a U/D input being '0' means count-up then here's the state transitions:

$$\begin{array}{c|c|c|c|c} \text{State} & \text{U/D=0 Next} & \text{U/D=0 Toggle} & \text{U/D=1 Next} & \text{U/D=1 Toggle}\\\\ {\begin{smallmatrix}\begin{array}{ccc} Q_C & Q_B & Q_A\\\\ 0&0&0\\ 0&0&1\\ 0&1&0\\ 0&1&1\\ 1&0&0\\ 1&0&1\\ 1&1&0\\ 1&1&1\\ \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{ccc} Q_C & Q_B & Q_A\\\\ 0&0&1\\ 0&1&0\\ 0&1&1\\ 1&0&0\\ 1&0&1\\ 1&1&0\\ 1&1&1\\ 0&0&0\\ \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{cccc} JK_C & JK_B & JK_A\\\\ 0&0&1\\ 0&1&1\\ 0&0&1\\ 1&1&1\\ 0&0&1\\ 0&1&1\\ 0&0&1\\ 1&1&1\\ \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{ccc} Q_C & Q_B & Q_A\\\\ 1&1&1\\ 0&0&0\\ 0&0&1\\ 0&1&0\\ 0&1&1\\ 1&0&0\\ 1&0&1\\ 1&1&0\\ \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{ccc} JK_C & JK_B & JK_A\\\\ 1&1&1\\ 0&0&1\\ 0&1&1\\ 0&0&1\\ 1&1&1\\ 0&0&1\\ 0&1&1\\ 0&0&1\\ \end{array}\end{smallmatrix}} \end{array}$$

Nice symmetries above lead to these relatively simple k-maps:

For \$U/D=0\$ (count up):

$$\begin{array}{rl} & \begin{smallmatrix}\begin{array}{r|cccc} JK_C&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_C}&0&0&1&0\\ Q_C&0&0&1&0 \end{array}\end{smallmatrix}\\\\ \begin{smallmatrix}\begin{array}{r|cccc} JK_B&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_C}&0&1&1&0\\ Q_C&0&1&1&0 \end{array}\end{smallmatrix} & \begin{smallmatrix}\begin{array}{r|cccc} JK_A&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_C}&1&1&1&1\\ Q_C&1&1&1&1 \end{array}\end{smallmatrix} \end{array}$$

For \$U/D=1\$ (count down):

$$\begin{array}{rl} & \begin{smallmatrix}\begin{array}{r|cccc} JK_C&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_C}&1&0&0&0\\ Q_C&1&0&0&0 \end{array}\end{smallmatrix}\\\\ \begin{smallmatrix}\begin{array}{r|cccc} JK_B&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_C}&1&0&0&1\\ Q_C&1&0&0&1 \end{array}\end{smallmatrix} & \begin{smallmatrix}\begin{array}{r|cccc} JK_A&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_C}&1&1&1&1\\ Q_C&1&1&1&1 \end{array}\end{smallmatrix} \end{array}$$

Since 74LSxx devices can sink a lot more current than they can source, wire it up like this:

enter image description here

It's synchronous so it will probably work a little better. I didn't try and calculate your 555 timer rate. Obviously though, keep it slow enough to perceive the counting. (Note the use of the \$\overline{Q}\$ outputs for activating the LEDs.)

  • \$\begingroup\$ Thank you, I will try it let the result be known. \$\endgroup\$ Jun 12 at 10:13
  • \$\begingroup\$ BTW, how does 555 factor into this, it's not hc or ls so does it not matter? And for XOR I have a cd4070, which series will that work with? \$\endgroup\$ Jun 12 at 11:22
  • \$\begingroup\$ @SamilTajani You will be fine with the 555. It's got a decent output that should work okay. There are cmos versions of the 555. They should also be fine, I believe. I'm not sure about the cd4070, though. I'd need to go read the datasheet on it. \$\endgroup\$ Jun 12 at 11:44
  • \$\begingroup\$ Thank you, this worked, I had to connect the inputs of xor to ground with a resistor though. \$\endgroup\$ Jun 12 at 14:59
  • \$\begingroup\$ @SamilTajani Glad it worked out. Hopefully, you followed the process I followed and can do this for yourself, now. \$\endgroup\$ Jun 12 at 20:32

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